From: Maxime Coquelin <mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: M'boumba Cedric Madianga
<cedric.madianga-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Patrice Chotard <patrice.chotard-qxv4g6HH51o@public.gmane.org>,
Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 2/5] i2c: Add STM32F4 I2C driver
Date: Wed, 1 Jun 2016 16:14:37 +0200 [thread overview]
Message-ID: <CALszF6ADLuZ0wK=L68FDzy5M5_eSPRTbNOjSoQw=dWDOjsPqCA@mail.gmail.com> (raw)
In-Reply-To: <CAOAejn1NQDJpGrTwGtpvSfVOGg3UuCkj8wLJ7B5LnW1-Z2VrQA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-06-01 16:01 GMT+02:00 M'boumba Cedric Madianga <cedric.madianga-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>:
> Hi Maxime,
>
>>>> +static void stm32f4_i2c_set_speed_mode(struct stm32f4_i2c_dev *i2c_dev)
>>>> +{
>>>> + struct stm32f4_i2c_timings *t = &i2c_timings[i2c_dev->speed];
>>>> + u32 ccr, val, clk_rate;
>>>> +
>>>> + ccr = readl_relaxed(i2c_dev->base + STM32F4_I2C_CCR);
>>>> + ccr &= ~(STM32F4_I2C_CCR_FS | STM32F4_I2C_CCR_DUTY |
>>>> + STM32F4_I2C_CCR_CCR_MASK);
>>>> +
>>>> + clk_rate = clk_get_rate(i2c_dev->clk);
>>>> +
>>>> + switch (i2c_dev->speed) {
>>>> + case STM32F4_I2C_SPEED_STANDARD:
>>>> + val = clk_rate / t->rate * 2;
>>>> + if (val < STM32F4_I2C_MIN_CCR)
>>>> + ccr |= STM32F4_I2C_CCR_CCR(STM32F4_I2C_MIN_CCR);
>>>> + else
>>>> + ccr |= STM32F4_I2C_CCR_CCR(val);
>>>> + break;
>>>> + case STM32F4_I2C_SPEED_FAST:
>>>> + ccr |= STM32F4_I2C_CCR_FS;
>>>> + if (t->duty) {
>>>> + ccr |= STM32F4_I2C_CCR_DUTY;
>>>> + ccr |= STM32F4_I2C_CCR_CCR(clk_rate / t->rate * 25);
>>>> + } else {
>>>> + ccr |= STM32F4_I2C_CCR_CCR(clk_rate / t->rate * 3);
>>>> + }
>>> Is it really useful since duty seems to always be 0?
>> Agree, I will rework it by directly set duty at 0 in the register.
>
> Contrary to what I wrote previously, the duty has to be set for FAST
> Mode to reach 400khz.
> So, I am going to keep the timing struct and set duty to 1 for FAST mode
Ok, That's fine by me.
--
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next prev parent reply other threads:[~2016-06-01 14:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-11 15:36 [PATCH 0/5] Add support for the STM32F4 I2C M'boumba Cedric Madianga
2016-05-11 15:36 ` [PATCH 1/5] dt-bindings: Document the STM32 I2C bindings M'boumba Cedric Madianga
[not found] ` <1462980974-22091-2-git-send-email-cedric.madianga-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-05-16 15:04 ` Rob Herring
2016-05-17 7:21 ` M'boumba Cedric Madianga
2016-05-11 15:36 ` [PATCH 2/5] i2c: Add STM32F4 I2C driver M'boumba Cedric Madianga
2016-05-17 9:48 ` Maxime Coquelin
[not found] ` <CALszF6A-jiCBtSO1RFDdgHKTKmsonRXFVs0x2zHha1LJ3UhwtQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-05-18 7:24 ` M'boumba Cedric Madianga
2016-06-01 14:01 ` M'boumba Cedric Madianga
[not found] ` <CAOAejn1NQDJpGrTwGtpvSfVOGg3UuCkj8wLJ7B5LnW1-Z2VrQA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-06-01 14:14 ` Maxime Coquelin [this message]
2016-06-02 15:35 ` M'boumba Cedric Madianga
2016-06-02 16:02 ` Maxime Coquelin
[not found] ` <CALszF6A9m1gwTg-HeGSukqbRUUz1cPv5R_-586uKzeVkkpQ93g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-06-03 7:44 ` M'boumba Cedric Madianga
2016-05-11 15:36 ` [PATCH 3/5] ARM: dts: Add I2C1 support for STM32F429 SoC M'boumba Cedric Madianga
2016-05-11 15:36 ` [PATCH 4/5] ARM: dts: Add I2C1 support for STM32429 eval board M'boumba Cedric Madianga
2016-05-11 15:36 ` [PATCH 5/5] ARM: configs: Add I2C support for STM32 defconfig M'boumba Cedric Madianga
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