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AJvYcCVwqsi1uRiNQJWP2m9o8S2jxVesZ4qlU3HY+V/wTM4z/yVkkk8js3qIj10St1UMO25bcqfj7E03S3wr6o+TeXh37vcMpfObPipfOA== X-Gm-Message-State: AOJu0YyeLKzUJ1p7kvVWwExhHURBwjtvpvLxt5+Yg2r3ZoIQEHC3Vcs3 nL9xEYbuOBvkNebOB/2cGraxZJdDxNfJXEfXswNvzouzfa1IzxD0ZSj55k3hUR+f1FvfjZQkacq sxGdDvjgV5PTtaYEU0xmha+Y3LjoAF7s3Rg5x X-Google-Smtp-Source: AGHT+IGcw1mE7GQw0RFfG3rYNhp3N2M96TVgZiM44ui1PYuC2rOp0yhfUgHlgGhehZWYsoHgBqII2uXkVaAYJ4TGtYU= X-Received: by 2002:a05:6602:6b12:b0:7d5:de78:1d8 with SMTP id ih18-20020a0566026b1200b007d5de7801d8mr21123669iob.18.1713891664253; Tue, 23 Apr 2024 10:01:04 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240221160215.484151-1-panikiel@google.com> <20240221160215.484151-8-panikiel@google.com> <09579b62-77fe-4ba4-b3a1-e3b17dff0188@linaro.org> In-Reply-To: <09579b62-77fe-4ba4-b3a1-e3b17dff0188@linaro.org> From: =?UTF-8?Q?Pawe=C5=82_Anikiel?= Date: Tue, 23 Apr 2024 19:00:53 +0200 Message-ID: Subject: Re: [PATCH v2 7/9] media: dt-bindings: Add Chameleon v3 framebuffer To: Krzysztof Kozlowski Cc: airlied@gmail.com, akpm@linux-foundation.org, conor+dt@kernel.org, daniel@ffwll.ch, dinguyen@kernel.org, hverkuil-cisco@xs4all.nl, krzysztof.kozlowski+dt@linaro.org, maarten.lankhorst@linux.intel.com, mchehab@kernel.org, mripard@kernel.org, robh+dt@kernel.org, tzimmermann@suse.de, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, chromeos-krk-upstreaming@google.com, ribalda@chromium.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi, sorry for the long delay On Mon, Feb 26, 2024 at 10:10=E2=80=AFAM Krzysztof Kozlowski wrote: > > On 21/02/2024 17:02, Pawe=C5=82 Anikiel wrote: > > The Chameleon v3 uses the framebuffer IP core to take the video signal > > from different sources and directly write frames into memory. > > > > Signed-off-by: Pawe=C5=82 Anikiel > > ... > > > + > > + reg: > > + items: > > + - description: core registers > > + - description: irq registers > > + > > + interrupts: > > + maxItems: 1 > > + > > + google,legacy-format: > > + type: boolean > > + description: The incoming video stream is in 32-bit padded mode. > > Why is this a property of board DTS? Can't the input streams change > depending on the usage? Who defines the incoming stream format? The input streams are defined by this hardware module - there are specific input lines for red, green, blue channels, h/v sync, etc. However, there are two variants of this module which behave differently - one has 60 input lines and outputs BGRX32, and the other one has 192 input lines and outputs RGB24. The "incoming 32-bit padded mode" referred to an internal bus inside of the module, which I realize isn't very meaningful. Instead, I think it would be better to have two compatibles, one for each variant of the module.