From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Andrei Simion <andrei.simion@microchip.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com,
claudiu.beznea@tuxon.dev, arnd@arndb.de,
gregkh@linuxfoundation.org, linux-i2c@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: Re: [PATCH v2 1/3] eeprom: at24: avoid adjusting offset for 24AA025E{48, 64}
Date: Wed, 26 Jun 2024 10:16:00 +0200 [thread overview]
Message-ID: <CAMRc=McFF523PswO=mVGAErEAVCExGdKt+0zmOLnGebAwA+i_g@mail.gmail.com> (raw)
In-Reply-To: <20240621121340.114486-2-andrei.simion@microchip.com>
On Fri, Jun 21, 2024 at 2:16 PM Andrei Simion
<andrei.simion@microchip.com> wrote:
>
> From: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> The EEPROMs could be used only for MAC storage. In this case the
> EEPROM areas where MACs resides could be modeled as NVMEM cells
> (directly via DT bindings) such that the already available networking
> infrastructure to read properly the MAC addresses (via
> of_get_mac_address()). The previously available compatibles needs the
> offset adjustment probably for compatibility w/ old DT bindings.
> Added "atmel,24mac02e4", "atmel,24mac02e6" compatible for the usage w/
Use imperative mode: "Add ...".
What does e4 and e6 stand for? It's not explained in the commit message.
> 24AA025E{48, 64} type of EEPROMs.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> Co-developed-by: Andrei Simion <andrei.simion@microchip.com>
> Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
> ---
> v1 -> v2:
> - no change
> ---
> drivers/misc/eeprom/at24.c | 73 ++++++++++++++++++++++----------------
> 1 file changed, 42 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
> index 4bd4f32bcdab..8699a6c585c4 100644
> --- a/drivers/misc/eeprom/at24.c
> +++ b/drivers/misc/eeprom/at24.c
> @@ -121,17 +121,19 @@ struct at24_chip_data {
> u32 byte_len;
> u8 flags;
> u8 bank_addr_shift;
> + u8 adjoff;
> void (*read_post)(unsigned int off, char *buf, size_t count);
> };
>
> -#define AT24_CHIP_DATA(_name, _len, _flags) \
> +#define AT24_CHIP_DATA(_name, _len, _flags, _adjoff) \
> static const struct at24_chip_data _name = { \
> - .byte_len = _len, .flags = _flags, \
> + .byte_len = _len, .flags = _flags, .adjoff = _adjoff, \
> }
>
This is a lot of churn for no reason, please keep this macro, add a
new one extended with adjoff and just pass 0 to it by default from the
existing one.
> -#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
> +#define AT24_CHIP_DATA_CB(_name, _len, _flags, _adjoff, _read_post) \
> static const struct at24_chip_data _name = { \
> .byte_len = _len, .flags = _flags, \
> + .adjoff = _adjoff, \
> .read_post = _read_post, \
> }
>
> @@ -162,53 +164,57 @@ static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
> }
>
> /* needs 8 addresses as A0-A2 are ignored */
> -AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
> +AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR, 0);
> /* old variants can't be handled with this generic entry! */
> -AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
> +AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0, 0);
> AT24_CHIP_DATA(at24_data_24cs01, 16,
> - AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> -AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
> + AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> +AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0, 0);
> AT24_CHIP_DATA(at24_data_24cs02, 16,
> - AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> + AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
> - AT24_FLAG_MAC | AT24_FLAG_READONLY);
> + AT24_FLAG_MAC | AT24_FLAG_READONLY, 1);
> AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
> - AT24_FLAG_MAC | AT24_FLAG_READONLY);
> + AT24_FLAG_MAC | AT24_FLAG_READONLY, 1);
> +AT24_CHIP_DATA(at24_data_24mac02e4, 48 / 8,
> + AT24_FLAG_MAC | AT24_FLAG_READONLY, 0);
> +AT24_CHIP_DATA(at24_data_24mac02e6, 64 / 8,
> + AT24_FLAG_MAC | AT24_FLAG_READONLY, 0);
> /* spd is a 24c02 in memory DIMMs */
> AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
> - AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
> + AT24_FLAG_READONLY | AT24_FLAG_IRUGO, 0);
> /* 24c02_vaio is a 24c02 on some Sony laptops */
> AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
> - AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
> + AT24_FLAG_READONLY | AT24_FLAG_IRUGO, 0,
> at24_read_post_vaio);
> -AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
> +AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0, 0);
> AT24_CHIP_DATA(at24_data_24cs04, 16,
> - AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> + AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> /* 24rf08 quirk is handled at i2c-core */
> -AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
> +AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0, 0);
> AT24_CHIP_DATA(at24_data_24cs08, 16,
> - AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> -AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
> + AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> +AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0, 0);
> AT24_CHIP_DATA(at24_data_24cs16, 16,
> - AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> -AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
> + AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> +AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16, 0);
> /* M24C32-D Additional Write lockable page (M24C32-D order codes) */
> -AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
> +AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16, 0);
> AT24_CHIP_DATA(at24_data_24cs32, 16,
> - AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> -AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
> + AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> +AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16, 0);
> /* M24C64-D Additional Write lockable page (M24C64-D order codes) */
> -AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
> +AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16, 0);
> AT24_CHIP_DATA(at24_data_24cs64, 16,
> - AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
> -AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
> -AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
> -AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
> -AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
> + AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY, 0);
> +AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16, 0);
> +AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16, 0);
> +AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16, 0);
> +AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16, 0);
> +AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16, 0);
> AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
> -AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
> /* identical to 24c08 ? */
> -AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
> +AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0, 0);
>
> static const struct i2c_device_id at24_ids[] = {
> { "24c00", (kernel_ulong_t)&at24_data_24c00 },
> @@ -217,7 +223,9 @@ static const struct i2c_device_id at24_ids[] = {
> { "24c02", (kernel_ulong_t)&at24_data_24c02 },
> { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
> { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
> + { "24mac02e4", (kernel_ulong_t)&at24_data_24mac02e4 },
> { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
> + { "24mac02e6", (kernel_ulong_t)&at24_data_24mac02e6 },
> { "spd", (kernel_ulong_t)&at24_data_spd },
> { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
> { "24c04", (kernel_ulong_t)&at24_data_24c04 },
> @@ -250,7 +258,9 @@ static const struct of_device_id __maybe_unused at24_of_match[] = {
> { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
> { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
> { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
> + { .compatible = "atmel,24mac02e4", .data = &at24_data_24mac02e4 },
> { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
> + { .compatible = "atmel,24mac02e6", .data = &at24_data_24mac02e6 },
> { .compatible = "atmel,spd", .data = &at24_data_spd },
> { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
> { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
> @@ -690,7 +700,8 @@ static int at24_probe(struct i2c_client *client)
> at24->read_post = cdata->read_post;
> at24->bank_addr_shift = cdata->bank_addr_shift;
> at24->num_addresses = num_addresses;
> - at24->offset_adj = at24_get_offset_adj(flags, byte_len);
> + at24->offset_adj = cdata->adjoff ?
> + at24_get_offset_adj(flags, byte_len) : 0;
> at24->client_regmaps[0] = regmap;
>
> at24->vcc_reg = devm_regulator_get(dev, "vcc");
> --
> 2.34.1
>
Bart
next prev parent reply other threads:[~2024-06-26 8:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-21 12:13 [PATCH v2 0/3] Read MAC address through NVMEM for sama7g5ek Andrei Simion
2024-06-21 12:13 ` [PATCH v2 1/3] eeprom: at24: avoid adjusting offset for 24AA025E{48, 64} Andrei Simion
2024-06-26 8:16 ` Bartosz Golaszewski [this message]
2024-06-21 12:13 ` [PATCH v2 2/3] ARM: dts: at91: at91-sama7g5ek: add EEPROMs Andrei Simion
2024-06-21 12:13 ` [PATCH v2 3/3] dt-bindings: eeprom: at24: Add at24,mac02e4 and at24,mac02e6 Andrei Simion
2024-06-21 14:14 ` Conor Dooley
2024-06-24 19:49 ` Rob Herring
2024-06-25 7:33 ` Andrei.Simion
2024-06-25 16:15 ` Conor Dooley
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