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AJvYcCVwBWMpxEEp6HHrUKcDdPb2v5Ygi28xmFgkXV8wfDJvyBkb4owWIdQHw03QtAOM6w0vK7PCzWNsKiZe@vger.kernel.org X-Gm-Message-State: AOJu0Yz3ZX/vRd2vTHUQBTBLzocJdb8Zg0K+CisCMjB5+DDJ67xcebgi 47bYt5zYQHvwCFQ9+ESKw/6d46TGA9d2yArodJtwsqTgEXEGXSZrx6eMQlLZYNvxzOq2IM6RWwD CDTerxJscrGlRYW2qlDHDqwMPZyoyHnxjAWLFEnVAVw== X-Gm-Gg: ASbGncuyse3xbDfzP31kr4+gdwaNmtuSwgmTJfGQ1F0kPKy42pW+GZ20zMNR8BbphNy gZb+AEQpmQorNkBa4W8jUKTA3DQP9W1AhqEaGN216zZUBFGiwTLbmZbu9EtipH3Dj0Z5+sJaFcq FmWkGhX/VMKTQrHcunS1ETrXFOqAlmVXe44D7OIgMx1jZYYKkG+DoRoDB3wzm58AI9ei5Uy3G1q MA= X-Google-Smtp-Source: AGHT+IGw32F/MdMOccKhZO4XhdGXd2zDj9BI3w6oPi/36aYPhkJHPAtjAIeBiB8am3xWo3XPqYfLxYrbf7Mw3kihmy8= X-Received: by 2002:a05:6512:118d:b0:553:2bdf:8b87 with SMTP id 2adb3069b0e04-55335b117ebmr4997380e87.10.1748875600944; Mon, 02 Jun 2025 07:46:40 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250530-apr_14_for_sending-v3-0-83d5744d997c@samsung.com> <20250530-apr_14_for_sending-v3-1-83d5744d997c@samsung.com> In-Reply-To: <20250530-apr_14_for_sending-v3-1-83d5744d997c@samsung.com> From: Bartosz Golaszewski Date: Mon, 2 Jun 2025 16:46:29 +0200 X-Gm-Features: AX0GCFvisvrL36l-aUNnU_LsfSK7tpw2-raHvXmZ5rzs225tzGALdRdBL2pjUL8 Message-ID: Subject: Re: [PATCH v3 1/8] dt-bindings: power: Add T-HEAD TH1520 GPU power sequencer To: Michal Wilczynski Cc: Drew Fustini , Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, May 30, 2025 at 12:24=E2=80=AFAM Michal Wilczynski wrote: > > Introduce device tree bindings for a new power sequencer provider > dedicated to the T-HEAD TH1520 SoC's GPU. > > The thead,th1520-gpu-pwrseq compatible designates a node that will > manage the complex power-up and power-down sequence for the GPU. This > sequencer requires a handle to the GPU's clock generator reset line > (gpu-clkgen), which is specified in its device tree node. > > This binding will be used by a new pwrseq driver to abstract the > SoC specific power management details from the generic GPU driver. > > Signed-off-by: Michal Wilczynski > --- > .../bindings/power/thead,th1520-pwrseq.yaml | 42 ++++++++++++++++= ++++++ > MAINTAINERS | 1 + > 2 files changed, 43 insertions(+) > > diff --git a/Documentation/devicetree/bindings/power/thead,th1520-pwrseq.= yaml b/Documentation/devicetree/bindings/power/thead,th1520-pwrseq.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..4c302abfb76fb9e243946f4ee= fa333c6b02e59d3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/thead,th1520-pwrseq.yaml > @@ -0,0 +1,42 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/power/thead,th1520-pwrseq.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: T-HEAD TH1520 GPU Power Sequencer > + > +maintainers: > + - Michal Wilczynski > + > +description: | > + This binding describes the power sequencer for the T-HEAD TH1520 GPU. > + This sequencer handles the specific power-up and power-down sequences > + required by the GPU, including managing clocks and resets from both th= e > + sequencer and the GPU device itself. > + > +properties: > + compatible: > + const: thead,th1520-gpu-pwrseq > + Before I review the rest: is this actually a physical device that takes care of the power sequencing? Some kind of a power management unit for the GPU? If so, I bet it's not called "power sequencer" so let's use its actual name as per the datasheet? Bart