From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Shiji Yang <yangshiji66@outlook.com>,
arinc.unal@arinc9.com, devicetree@vger.kernel.org,
john@phrozen.org, krzysztof.kozlowski+dt@linaro.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@vger.kernel.org, matthias.bgg@gmail.com,
mturquette@baylibre.com, p.zabel@pengutronix.de,
robh+dt@kernel.org, sboyd@kernel.org, tsbogend@alpha.franken.de
Subject: Re: [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs
Date: Sat, 17 Jun 2023 21:11:46 +0200 [thread overview]
Message-ID: <CAMhs-H-uc_VzZ4MS0VLn9AajFRM-BYKEn4zGJ36H3EmL0oX-WA@mail.gmail.com> (raw)
In-Reply-To: <10f01535-ab4f-b0d4-306b-a90f4ad19008@linaro.org>
On Sat, Jun 17, 2023 at 7:20 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 17/06/2023 17:37, Sergio Paracuellos wrote:
> >>> The case of
> >>> searching for compatible is a mess since as you can see in the
> >>> bindings there are tons of compatibles to search for, then (this code
> >>> is common to all ralink platforms).
> >>
> >> Compatible is one of the ways using ABI.
> >
> > Ok so it is also a broken approach, then.
>
> What is exactly broken approach? Fetching by compatibles? Somehow many
> other platforms do not have problem with that, even for multiple
> compatibles. Why yours is special?
I guess it is not special but I cannot figure out the way of getting
this clock using compatibles...
>
> Anyway, it is not a correct way to get clocks frequency. There is CCF
> for this, although maybe Ralink does not support it?
This means to use clk_get() if I understand properly but it does not
work at all for ralink...
>
> Best regards,
> Krzysztof
>
Thanks,
Sergio Paracuellos
next prev parent reply other threads:[~2023-06-17 19:12 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-17 5:24 [PATCH v4 0/9] [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 1/9] dt-bindings: clock: add mtmips SoCs system controller Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-17 12:54 ` [PATCH v3 " Shiji Yang
2023-06-17 13:07 ` Krzysztof Kozlowski
2023-06-17 13:31 ` Sergio Paracuellos
2023-06-17 14:43 ` Krzysztof Kozlowski
2023-06-17 15:37 ` Sergio Paracuellos
2023-06-17 17:20 ` Krzysztof Kozlowski
2023-06-17 19:11 ` Sergio Paracuellos [this message]
2023-06-18 5:04 ` Sergio Paracuellos
2023-06-17 13:26 ` Sergio Paracuellos
2023-06-17 14:43 ` Krzysztof Kozlowski
2023-06-17 15:31 ` Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 3/9] mips: ralink: rt288x: remove clock related code Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 4/9] mips: ralink: rt305x: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 5/9] mips: ralink: rt3883: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 6/9] mips: ralink: mt7620: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 7/9] mips: ralink: remove reset " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 8/9] mips: ralink: get cpu rate from new driver code Sergio Paracuellos
2023-06-17 14:48 ` Krzysztof Kozlowski
2023-06-17 15:35 ` Sergio Paracuellos
2023-06-17 17:27 ` Krzysztof Kozlowski
2023-06-17 19:01 ` Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 9/9] MAINTAINERS: add Mediatek MTMIPS Clock maintainer Sergio Paracuellos
-- strict thread matches above, loose matches on Subject: below --
2023-04-18 9:03 [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-04-18 9:03 ` [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-16 18:03 ` Stephen Boyd
2023-06-17 4:51 ` yangshiji66
2023-06-17 5:06 ` Sergio Paracuellos
2023-06-17 5:50 ` Shiji Yang
2023-06-17 6:00 ` Sergio Paracuellos
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