[RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jagan Teki]

Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.

A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0 with
RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
This series merely concentrated on HDMI pipeline and rest will add eventually.

patch 1: dt-bindings for a64 DE2 CCU

patch 2: a64 DE2 CCU node addition

patch 3: dt-bindings for a64 DE2 pipeline

patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd

patch 6: a64 DE2 pipeline node addition

patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY

patch 9: a64 HDMI nodes addition

patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv

patch 12: a64 HDMI pipeline

patch 13: enable HDMI out on bananpi-m64

Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
thread), able to detect the HDMI but, no penguins on screen.

Request for any suggestions.

Test log on Bananpi-m64:
[    0.247631] sun4i-drm display-engine: bound 1100000.mixer (ops sun8i_mixer_ops)
[    0.256717] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
[    0.256783] sun4i-tcon 1c0c000.lcd-controller: Missing LVDS properties, Please upgrade your DT
[    0.256792] sun4i-tcon 1c0c000.lcd-controller: LVDS output disabled
[    0.257081] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
[    0.257099] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops sun4i_tcon_ops)
[    0.257273] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
[    0.257288] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
[    0.258176] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_p)
[    0.258596] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
[    0.259188] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
[    0.259199] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    0.259205] [drm] No driver support for vblank timestamp query.
[    0.259308] [drm] Cannot find any crtc or sizes
[    0.259824] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0

[1] https://lkml.org/lkml/2018/3/16/1096

Jagan Teki (13):
  dt-bindings: clock: Add compatible for A64 DE2 CCU
  arm64: dts: allwinner: a64: Add DE2 CCU
  bindings: display: Add compatible for A64 DE2 pipeline
  bindings: display: Add compatible for A64 Mixer0
  bindings: display: Add compatible for A64 tcon-lcd
  arm64: dts: allwinner: a64: Add DE2 pipeline
  bindings: display: Add compatible for A64 HDMI
  bindings: display: Add compatible for A64 HDMI PHY
  arm64: dts: allwinner: a64: Add HDMI support
  bindings: display: Add compatible for A64 Mixer1
  bindings: display: Add compatible for A64 tcon-tv
  arm64: dts: allwinner: a64: Add HDMI pipeline
  arm64: dts: allwinner: a64: bananapi-m64: Enable HDMI output

 .../devicetree/bindings/clock/sun8i-de2.txt        |   1 +
 .../bindings/display/sunxi/sun4i-drm.txt           |   7 +
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  26 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 181 +++++++++++++++++++++
 drivers/gpu/drm/sun4i/sun4i_drv.c                  |   1 +
 include/dt-bindings/clock/sun50i-a64-ccu.h         |   2 +
 6 files changed, 218 insertions(+)

-- 
2.14.3

[RFC 01/13] dt-bindings: clock: Add compatible for A64 DE2 CCU

[Jagan Teki]

Allwinner A64 has DE2 CCU which is similar to H3/H5 SoC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/clock/sun8i-de2.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
index f2fa87c4765c..7f425bc0e820 100644
--- a/Documentation/devicetree/bindings/clock/sun8i-de2.txt
+++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
@@ -7,6 +7,7 @@ Required properties :
 		- "allwinner,sun8i-h3-de2-clk"
 		- "allwinner,sun8i-v3s-de2-clk"
 		- "allwinner,sun50i-h5-de2-clk"
+		- "allwinner,sun50i-a64-de2-clk"
 
 - reg: Must contain the registers base address and length
 - clocks: phandle to the clocks feeding the display engine subsystem.
-- 
2.14.3

[RFC 02/13] arm64: dts: allwinner: a64: Add DE2 CCU

[Jagan Teki]

DE2 in A64 has clock control unit and behavior is
same like H3/H5, so reuse the same in A64.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b2ef28c42bd..67b80bbe5bf5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -43,9 +43,11 @@
  */
 
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-r-ccu.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -168,6 +170,19 @@
 		#size-cells = <1>;
 		ranges;
 
+		display_clocks: clock@1000000 {
+			compatible = "allwinner,sun50i-a64-de2-clk",
+				     "allwinner,sun50i-h5-de2-clk";
+			reg = <0x01000000 0x100000>;
+			clocks = <&ccu CLK_DE>,
+				 <&ccu CLK_BUS_DE>;
+			clock-names = "mod",
+				      "bus";
+			resets = <&ccu RST_BUS_DE>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
 		syscon: syscon@1c00000 {
 			compatible = "allwinner,sun50i-a64-system-controller",
 				"syscon";
-- 
2.14.3

[RFC 03/13] bindings: display: Add compatible for A64 DE2 pipeline

[Jagan Teki]

Allwinner A64 has DE2 pipeline similar to other Allwinner
SOC's like A83T, H3/H5.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 3346c1e2a7a0..f0fd9274a25d 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -343,6 +343,7 @@ Required properties:
     * allwinner,sun8i-h3-display-engine
     * allwinner,sun8i-v3s-display-engine
     * allwinner,sun9i-a80-display-engine
+    * allwinner,sun50i-a64-display-engine
 
   - allwinner,pipelines: list of phandle to the display engine
     frontends (DE 1.0) or mixers (DE 2.0) available.
-- 
2.14.3

Re: [RFC 03/13] bindings: display: Add compatible for A64 DE2 pipeline

[Chen-Yu Tsai]

On Tue, Apr 24, 2018 at 9:34 PM, Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> Allwinner A64 has DE2 pipeline similar to other Allwinner
> SOC's like A83T, H3/H5.
>
> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +

All the device tree binding patches can be merged into one.

ChenYu

[RFC 04/13] bindings: display: Add compatible for A64 Mixer0

[Jagan Teki]

Mixer0 on Allwinner A64 has similar behavior like Allwinner A83T.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index f0fd9274a25d..1b2fea2d51e1 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -311,6 +311,7 @@ Required properties:
     * allwinner,sun8i-a83t-de2-mixer-1
     * allwinner,sun8i-h3-de2-mixer-0
     * allwinner,sun8i-v3s-de2-mixer
+    * allwinner,sun50i-a64-de2-mixer-0
   - reg: base address and size of the memory-mapped region.
   - clocks: phandles to the clocks feeding the mixer
     * bus: the mixer interface clock
-- 
2.14.3

[RFC 05/13] bindings: display: Add compatible for A64 tcon-lcd

[Jagan Teki]

tcon-lcd on Allwinner A64 has similar behavior like Allwinner A83T.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 1b2fea2d51e1..c63dfc99978c 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -148,6 +148,7 @@ Required properties:
    * allwinner,sun8i-v3s-tcon
    * allwinner,sun9i-a80-tcon-lcd
    * allwinner,sun9i-a80-tcon-tv
+   * allwinner,sun50i-a64-tcon-lcd
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
  - clocks: phandles to the clocks feeding the TCON.
-- 
2.14.3

[RFC 06/13] arm64: dts: allwinner: a64: Add DE2 pipeline

[Jagan Teki]

The display pipeline on A64 has similar behavior like A83T,
so use A83 compatible strings for probing relevant drivers.

Added Mixer0, tcon0 has initial support, rest will add eventually.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 61 +++++++++++++++++++++++++++
 drivers/gpu/drm/sun4i/sun4i_drv.c             |  1 +
 2 files changed, 62 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 67b80bbe5bf5..b8734319dc77 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -107,6 +107,12 @@
 		};
 	};
 
+	de: display-engine {
+		compatible = "allwinner,sun50i-a64-display-engine";
+		allwinner,pipelines = <&mixer0>;
+		status = "disabled";
+	};
+
 	osc24M: osc24M_clk {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
@@ -183,6 +189,30 @@
 			#reset-cells = <1>;
 		};
 
+		mixer0: mixer@1100000 {
+			compatible = "allwinner,sun50i-a64-de2-mixer-0",
+				     "allwinner,sun8i-a83t-de2-mixer-0";
+			reg = <0x01100000 0x100000>;
+			clocks = <&display_clocks CLK_BUS_MIXER0>,
+				 <&display_clocks CLK_MIXER0>;
+			clock-names = "bus",
+				      "mod";
+			resets = <&display_clocks RST_MIXER0>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mixer0_out: port@1 {
+					reg = <1>;
+
+					mixer0_out_tcon0: endpoint {
+						remote-endpoint = <&tcon0_in_mixer0>;
+					};
+				};
+			};
+		};
+
 		syscon: syscon@1c00000 {
 			compatible = "allwinner,sun50i-a64-system-controller",
 				"syscon";
@@ -200,6 +230,37 @@
 			#dma-cells = <1>;
 		};
 
+		tcon0: lcd-controller@1c0c000 {
+			compatible = "allwinner,sun50i-a64-tcon-lcd",
+				     "allwinner,sun8i-a83t-tcon-lcd";
+			reg = <0x01c0c000 0x1000>;
+			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+			clock-names = "ahb", "tcon-ch0";
+			clock-output-names = "tcon-pixel-clock";
+			resets = <&ccu RST_BUS_TCON0>;
+			reset-names = "lcd";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tcon0_in: port@0 {
+					reg = <0>;
+
+					tcon0_in_mixer0: endpoint {
+						remote-endpoint = <&mixer0_out_tcon0>;
+					};
+				};
+
+				tcon0_out: port@1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+				};
+			};
+		};
+
 		mmc0: mmc@1c0f000 {
 			compatible = "allwinner,sun50i-a64-mmc";
 			reg = <0x01c0f000 0x1000>;
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 50d19605c38f..c84102a750f8 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -368,6 +368,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
 	{ .compatible = "allwinner,sun8i-h3-display-engine" },
 	{ .compatible = "allwinner,sun8i-v3s-display-engine" },
 	{ .compatible = "allwinner,sun9i-a80-display-engine" },
+	{ .compatible = "allwinner,sun50i-a64-display-engine" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_drv_of_table);
-- 
2.14.3

[RFC 07/13] bindings: display: Add compatible for A64 HDMI

[Jagan Teki]

HDMI on Allwinner A64 has similar like H3/H5.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index c63dfc99978c..98b3f5aae117 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -78,6 +78,7 @@ Required properties:
 
   - compatible: value must be one of:
     * "allwinner,sun8i-a83t-dw-hdmi"
+    * "allwinner,sun50i-a64-dw-hdmi"
   - reg: base address and size of memory-mapped region
   - reg-io-width: See dw_hdmi.txt. Shall be 1.
   - interrupts: HDMI interrupt number
-- 
2.14.3

[RFC 08/13] bindings: display: Add compatible for A64 HDMI PHY

[Jagan Teki]

HDMI PHY on Allwinner A64 has similar like H3/H5.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 98b3f5aae117..448f99a91382 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -104,6 +104,7 @@ Required properties:
   - compatible: value must be one of:
     * allwinner,sun8i-a83t-hdmi-phy
     * allwinner,sun8i-h3-hdmi-phy
+    * allwinner,sun50i-a64-hdmi-phy
   - reg: base address and size of memory-mapped region
   - clocks: phandles to the clocks feeding the HDMI PHY
     * bus: the HDMI PHY interface clock
-- 
2.14.3

[RFC 09/13] arm64: dts: allwinner: a64: Add HDMI support

[Jagan Teki]

HDMI on Allwinner A64 has similar behavior like H3/H5, so
reuse the same dts node details for A64.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++++++++++
 include/dt-bindings/clock/sun50i-a64-ccu.h    |  2 ++
 2 files changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index b8734319dc77..aa73f1ce1ab2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -705,6 +705,34 @@
 			#interrupt-cells = <3>;
 		};
 
+		hdmi: hdmi@1ee0000 {
+			compatible = "allwinner,sun50i-a64-dw-hdmi",
+				     "allwinner,sun8i-a83t-dw-hdmi";
+			reg = <0x01ee0000 0x10000>;
+			reg-io-width = <1>;
+			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
+				 <&ccu CLK_HDMI>;
+			clock-names = "iahb", "isfr", "tmds";
+			resets = <&ccu RST_BUS_HDMI1>;
+			reset-names = "ctrl";
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+			status = "disabled";
+		};
+
+		hdmi_phy: hdmi-phy@1ef0000 {
+			compatible = "allwinner,sun50i-a64-hdmi-phy",
+				     "allwinner,sun8i-h3-hdmi-phy";
+			reg = <0x01ef0000 0x10000>;
+			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
+				 <&ccu CLK_PLL_VIDEO0>;
+			clock-names = "bus", "mod", "pll-0";
+			resets = <&ccu RST_BUS_HDMI0>;
+			reset-names = "phy";
+			#phy-cells = <0>;
+		};
+
 		rtc: rtc@1f00000 {
 			compatible = "allwinner,sun6i-a31-rtc";
 			reg = <0x01f00000 0x54>;
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
index d66432c6e675..a054ff665d6e 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
 
+#define CLK_PLL_VIDEO0		7
+
 #define CLK_PLL_PERIPH0		11
 
 #define CLK_BUS_MIPI_DSI	28
-- 
2.14.3

Re: [RFC 09/13] arm64: dts: allwinner: a64: Add HDMI support

[Jernej Škrabec]

Hi,

Dne torek, 24. april 2018 ob 15:34:21 CEST je Jagan Teki napisal(a):
> HDMI on Allwinner A64 has similar behavior like H3/H5, so
> reuse the same dts node details for A64.
> 
> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28
> +++++++++++++++++++++++++++ include/dt-bindings/clock/sun50i-a64-ccu.h    |
>  2 ++
>  2 files changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index
> b8734319dc77..aa73f1ce1ab2 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -705,6 +705,34 @@
>  			#interrupt-cells = <3>;
>  		};
> 
> +		hdmi: hdmi@1ee0000 {
> +			compatible = "allwinner,sun50i-a64-dw-hdmi",
> +				     "allwinner,sun8i-a83t-dw-hdmi";
> +			reg = <0x01ee0000 0x10000>;
> +			reg-io-width = <1>;
> +			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
> +				 <&ccu CLK_HDMI>;
> +			clock-names = "iahb", "isfr", "tmds";
> +			resets = <&ccu RST_BUS_HDMI1>;
> +			reset-names = "ctrl";
> +			phys = <&hdmi_phy>;
> +			phy-names = "hdmi-phy";
> +			status = "disabled";
> +		};
> +
> +		hdmi_phy: hdmi-phy@1ef0000 {
> +			compatible = "allwinner,sun50i-a64-hdmi-phy",
> +				     "allwinner,sun8i-h3-hdmi-phy";
> +			reg = <0x01ef0000 0x10000>;
> +			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
> +				 <&ccu CLK_PLL_VIDEO0>;
> +			clock-names = "bus", "mod", "pll-0";

Unfortunately, that won't work in all cases. HDMI has two possible clock 
parents and only one can be selected. If HDMI controller clock has PLL_VIDEO1 
as a source, you will calculate wrong divider in HDMI PHY, since you will base 
calculations on PLL_VIDEO0. I think driver needs an expansion.

That is also one of the reasons why I didn't yet send A64 HDMI patch series (I 
didn't figure out this part yet). The other reason is that I'm waiting on SRAM 
C claiming code.

Best regards,
Jernej

> +			resets = <&ccu RST_BUS_HDMI0>;
> +			reset-names = "phy";
> +			#phy-cells = <0>;
> +		};
> +
>  		rtc: rtc@1f00000 {
>  			compatible = "allwinner,sun6i-a31-rtc";
>  			reg = <0x01f00000 0x54>;
> diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h
> b/include/dt-bindings/clock/sun50i-a64-ccu.h index
> d66432c6e675..a054ff665d6e 100644
> --- a/include/dt-bindings/clock/sun50i-a64-ccu.h
> +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
> @@ -43,6 +43,8 @@
>  #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
>  #define _DT_BINDINGS_CLK_SUN50I_A64_H_
> 
> +#define CLK_PLL_VIDEO0		7
> +
>  #define CLK_PLL_PERIPH0		11
> 
>  #define CLK_BUS_MIPI_DSI	28
> --
> 2.14.3

[RFC 10/13] bindings: display: Add compatible for A64 Mixer1

[Jagan Teki]

Mixer1 on Allwinner A64 has similar behavior like Allwinner A83T.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 448f99a91382..3576006e9dbb 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -315,6 +315,7 @@ Required properties:
     * allwinner,sun8i-h3-de2-mixer-0
     * allwinner,sun8i-v3s-de2-mixer
     * allwinner,sun50i-a64-de2-mixer-0
+    * allwinner,sun50i-a64-de2-mixer-1
   - reg: base address and size of the memory-mapped region.
   - clocks: phandles to the clocks feeding the mixer
     * bus: the mixer interface clock
-- 
2.14.3

[RFC 11/13] bindings: display: Add compatible for A64 tcon-tv

[Jagan Teki]

tcon-tv on Allwinner A64 has similar behavior like Allwinner A83T.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 3576006e9dbb..cf7c7e535d9c 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -151,6 +151,7 @@ Required properties:
    * allwinner,sun9i-a80-tcon-lcd
    * allwinner,sun9i-a80-tcon-tv
    * allwinner,sun50i-a64-tcon-lcd
+   * allwinner,sun50i-a64-tcon-tv
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
  - clocks: phandles to the clocks feeding the TCON.
-- 
2.14.3

[RFC 12/13] arm64: dts: allwinner: a64: Add HDMI pipeline

[Jagan Teki]

HDMI pipeline on A64 has similar behavior like A83T where
tcon1 is connected to HDMI. So reuse similar dts nodes for A64.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 79 ++++++++++++++++++++++++++-
 1 file changed, 78 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index aa73f1ce1ab2..56e06e504d5f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -109,7 +109,7 @@
 
 	de: display-engine {
 		compatible = "allwinner,sun50i-a64-display-engine";
-		allwinner,pipelines = <&mixer0>;
+		allwinner,pipelines = <&mixer0>, <&mixer1>;
 		status = "disabled";
 	};
 
@@ -213,6 +213,31 @@
 			};
 		};
 
+		mixer1: mixer@1200000 {
+			compatible = "allwinner,sun50i-a64-de2-mixer-1",
+				     "allwinner,sun8i-a83t-de2-mixer-1";
+			reg = <0x01200000 0x100000>;
+			clocks = <&display_clocks CLK_BUS_MIXER1>,
+				 <&display_clocks CLK_MIXER1>;
+			clock-names = "bus",
+				      "mod";
+			resets = <&display_clocks RST_WB>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mixer1_out: port@1 {
+					reg = <1>;
+
+					mixer1_out_tcon1: endpoint {
+						remote-endpoint = <&tcon1_in_mixer1>;
+					};
+				};
+			};
+		};
+
+
 		syscon: syscon@1c00000 {
 			compatible = "allwinner,sun50i-a64-system-controller",
 				"syscon";
@@ -261,6 +286,41 @@
 			};
 		};
 
+		tcon1: lcd-controller@1c0d000 {
+			compatible = "allwinner,sun50i-a64-tcon-tv",
+				     "allwinner,sun8i-a83t-tcon-tv";
+			reg = <0x01c0d000 0x1000>;
+			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
+			clock-names = "ahb", "tcon-ch1";
+			resets = <&ccu RST_BUS_TCON1>;
+			reset-names = "lcd";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tcon1_in: port@0 {
+					reg = <0>;
+
+					tcon1_in_mixer1: endpoint {
+						remote-endpoint = <&mixer1_out_tcon1>;
+					};
+				};
+
+				tcon1_out: port@1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+
+					tcon1_out_hdmi: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&hdmi_in_tcon1>;
+					};
+				};
+			};
+		};
+
 		mmc0: mmc@1c0f000 {
 			compatible = "allwinner,sun50i-a64-mmc";
 			reg = <0x01c0f000 0x1000>;
@@ -719,6 +779,23 @@
 			phys = <&hdmi_phy>;
 			phy-names = "hdmi-phy";
 			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				hdmi_in: port@0 {
+					reg = <0>;
+
+					hdmi_in_tcon1: endpoint {
+						remote-endpoint = <&tcon1_out_hdmi>;
+					};
+				};
+
+				hdmi_out: port@1 {
+					reg = <1>;
+				};
+			};
 		};
 
 		hdmi_phy: hdmi-phy@1ef0000 {
-- 
2.14.3

[RFC 13/13] arm64: dts: allwinner: a64: bananapi-m64: Enable HDMI output

[Jagan Teki]

Enable HDMI output on Bananpi-m64 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 2250dec9974c..50debe17e8fa 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -60,6 +60,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -86,6 +97,10 @@
 	};
 };
 
+&de {
+	status = "okay";
+};
+
 &ehci1 {
 	status = "okay";
 };
@@ -99,6 +114,17 @@
 	status = "okay";
 };
 
+&hdmi {
+	vcc-hdmi-dsi-supply = <&reg_dldo1>;
+	status = "okay";
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
 &i2c1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c1_pins>;
-- 
2.14.3

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 2597 bytes --]

On Tue, Apr 24, 2018 at 07:04:12PM +0530, Jagan Teki wrote:
> Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
> 
> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0 with
> RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
> This series merely concentrated on HDMI pipeline and rest will add eventually.
> 
> patch 1: dt-bindings for a64 DE2 CCU
> 
> patch 2: a64 DE2 CCU node addition
> 
> patch 3: dt-bindings for a64 DE2 pipeline
> 
> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
> 
> patch 6: a64 DE2 pipeline node addition
> 
> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
> 
> patch 9: a64 HDMI nodes addition
> 
> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
> 
> patch 12: a64 HDMI pipeline
> 
> patch 13: enable HDMI out on bananpi-m64
> 
> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
> thread), able to detect the HDMI but, no penguins on screen.
> 
> Request for any suggestions.
> 
> Test log on Bananpi-m64:
> [    0.247631] sun4i-drm display-engine: bound 1100000.mixer (ops sun8i_mixer_ops)
> [    0.256717] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
> [    0.256783] sun4i-tcon 1c0c000.lcd-controller: Missing LVDS properties, Please upgrade your DT
> [    0.256792] sun4i-tcon 1c0c000.lcd-controller: LVDS output disabled

That doesn't seem to work so well for LVDS.

> [    0.257081] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
> [    0.257099] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops sun4i_tcon_ops)
> [    0.257273] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
> [    0.257288] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
> [    0.258176] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_p)
> [    0.258596] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
> [    0.259188] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
> [    0.259199] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [    0.259205] [drm] No driver support for vblank timestamp query.
> [    0.259308] [drm] Cannot find any crtc or sizes

A good guess would be that you can't get the EDIDs for some
reason. Have you tried forcing a mode to see if the display part
already works?

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jagan Teki]

On Tue, Apr 24, 2018 at 7:38 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Tue, Apr 24, 2018 at 07:04:12PM +0530, Jagan Teki wrote:
>> Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
>>
>> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0 with
>> RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
>> This series merely concentrated on HDMI pipeline and rest will add eventually.
>>
>> patch 1: dt-bindings for a64 DE2 CCU
>>
>> patch 2: a64 DE2 CCU node addition
>>
>> patch 3: dt-bindings for a64 DE2 pipeline
>>
>> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
>>
>> patch 6: a64 DE2 pipeline node addition
>>
>> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
>>
>> patch 9: a64 HDMI nodes addition
>>
>> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
>>
>> patch 12: a64 HDMI pipeline
>>
>> patch 13: enable HDMI out on bananpi-m64
>>
>> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
>> thread), able to detect the HDMI but, no penguins on screen.
>>
>> Request for any suggestions.
>>
>> Test log on Bananpi-m64:
>> [    0.247631] sun4i-drm display-engine: bound 1100000.mixer (ops sun8i_mixer_ops)
>> [    0.256717] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
>> [    0.256783] sun4i-tcon 1c0c000.lcd-controller: Missing LVDS properties, Please upgrade your DT
>> [    0.256792] sun4i-tcon 1c0c000.lcd-controller: LVDS output disabled
>
> That doesn't seem to work so well for LVDS.
>
>> [    0.257081] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
>> [    0.257099] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops sun4i_tcon_ops)
>> [    0.257273] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
>> [    0.257288] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
>> [    0.258176] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_p)
>> [    0.258596] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
>> [    0.259188] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
>> [    0.259199] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>> [    0.259205] [drm] No driver support for vblank timestamp query.
>> [    0.259308] [drm] Cannot find any crtc or sizes
>
> A good guess would be that you can't get the EDIDs for some
> reason. Have you tried forcing a mode to see if the display part
> already works?

Yes I've forced and used custom EDID with 1024x786 bin and observed
that the bin is able to load.

[    0.262973] [drm] No driver support for vblank timestamp query.
[    0.263842] [drm] Got built-in EDID base block and 0 extensions
from "edid/1024x768.bin" for connector

Jagan.

-- 
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 3201 bytes --]

On Wed, Apr 25, 2018 at 06:29:05PM +0530, Jagan Teki wrote:
> On Tue, Apr 24, 2018 at 7:38 PM, Maxime Ripard
> <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:
> > On Tue, Apr 24, 2018 at 07:04:12PM +0530, Jagan Teki wrote:
> >> Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
> >>
> >> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0 with
> >> RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
> >> This series merely concentrated on HDMI pipeline and rest will add eventually.
> >>
> >> patch 1: dt-bindings for a64 DE2 CCU
> >>
> >> patch 2: a64 DE2 CCU node addition
> >>
> >> patch 3: dt-bindings for a64 DE2 pipeline
> >>
> >> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
> >>
> >> patch 6: a64 DE2 pipeline node addition
> >>
> >> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
> >>
> >> patch 9: a64 HDMI nodes addition
> >>
> >> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
> >>
> >> patch 12: a64 HDMI pipeline
> >>
> >> patch 13: enable HDMI out on bananpi-m64
> >>
> >> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
> >> thread), able to detect the HDMI but, no penguins on screen.
> >>
> >> Request for any suggestions.
> >>
> >> Test log on Bananpi-m64:
> >> [    0.247631] sun4i-drm display-engine: bound 1100000.mixer (ops sun8i_mixer_ops)
> >> [    0.256717] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
> >> [    0.256783] sun4i-tcon 1c0c000.lcd-controller: Missing LVDS properties, Please upgrade your DT
> >> [    0.256792] sun4i-tcon 1c0c000.lcd-controller: LVDS output disabled
> >
> > That doesn't seem to work so well for LVDS.
> >
> >> [    0.257081] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
> >> [    0.257099] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops sun4i_tcon_ops)
> >> [    0.257273] sun4i-drm display-engine: No panel or bridge found... RGB output disabled
> >> [    0.257288] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
> >> [    0.258176] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_p)
> >> [    0.258596] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
> >> [    0.259188] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
> >> [    0.259199] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> >> [    0.259205] [drm] No driver support for vblank timestamp query.
> >> [    0.259308] [drm] Cannot find any crtc or sizes
> >
> > A good guess would be that you can't get the EDIDs for some
> > reason. Have you tried forcing a mode to see if the display part
> > already works?
> 
> Yes I've forced and used custom EDID with 1024x786 bin and observed
> that the bin is able to load.
> 
> [    0.262973] [drm] No driver support for vblank timestamp query.
> [    0.263842] [drm] Got built-in EDID base block and 0 extensions
> from "edid/1024x768.bin" for connector

It's not really clear, is it displaying something?

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jernej Škrabec]

Hi,

Dne sreda, 25. april 2018 ob 15:55:48 CEST je Maxime Ripard napisal(a):
> On Wed, Apr 25, 2018 at 06:29:05PM +0530, Jagan Teki wrote:
> > On Tue, Apr 24, 2018 at 7:38 PM, Maxime Ripard
> > 
> > <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:
> > > On Tue, Apr 24, 2018 at 07:04:12PM +0530, Jagan Teki wrote:
> > >> Allwinner A64 has display engine pipeline like other Allwinner SOC's
> > >> A83T/H3/H5.
> > >> 
> > >> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to
> > >> tcon0 with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with
> > >> HDMI.
> > >> This series merely concentrated on HDMI pipeline and rest will add
> > >> eventually.
> > >> 
> > >> patch 1: dt-bindings for a64 DE2 CCU
> > >> 
> > >> patch 2: a64 DE2 CCU node addition
> > >> 
> > >> patch 3: dt-bindings for a64 DE2 pipeline
> > >> 
> > >> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
> > >> 
> > >> patch 6: a64 DE2 pipeline node addition
> > >> 
> > >> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
> > >> 
> > >> patch 9: a64 HDMI nodes addition
> > >> 
> > >> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
> > >> 
> > >> patch 12: a64 HDMI pipeline
> > >> 
> > >> patch 13: enable HDMI out on bananpi-m64
> > >> 
> > >> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
> > >> thread), able to detect the HDMI but, no penguins on screen.
> > >> 
> > >> Request for any suggestions.
> > >> 
> > >> Test log on Bananpi-m64:
> > >> [    0.247631] sun4i-drm display-engine: bound 1100000.mixer (ops
> > >> sun8i_mixer_ops) [    0.256717] sun4i-drm display-engine: bound
> > >> 1200000.mixer (ops sun8i_mixer_ops) [    0.256783] sun4i-tcon
> > >> 1c0c000.lcd-controller: Missing LVDS properties, Please upgrade your
> > >> DT [    0.256792] sun4i-tcon 1c0c000.lcd-controller: LVDS output
> > >> disabled> > 
> > > That doesn't seem to work so well for LVDS.
> > > 
> > >> [    0.257081] sun4i-drm display-engine: No panel or bridge found...
> > >> RGB output disabled [    0.257099] sun4i-drm display-engine: bound
> > >> 1c0c000.lcd-controller (ops sun4i_tcon_ops) [    0.257273] sun4i-drm
> > >> display-engine: No panel or bridge found... RGB output disabled [   
> > >> 0.257288] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops
> > >> sun4i_tcon_ops) [    0.258176] sun8i-dw-hdmi 1ee0000.hdmi: Detected
> > >> HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_p) [    0.258596]
> > >> sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
> > >> [    0.259188] sun4i-drm display-engine: bound 1ee0000.hdmi (ops
> > >> sun8i_dw_hdmi_ops) [    0.259199] [drm] Supports vblank timestamp
> > >> caching Rev 2 (21.10.2013). [    0.259205] [drm] No driver support for
> > >> vblank timestamp query. [    0.259308] [drm] Cannot find any crtc or
> > >> sizes
> > > 
> > > A good guess would be that you can't get the EDIDs for some
> > > reason. Have you tried forcing a mode to see if the display part
> > > already works?
> > 
> > Yes I've forced and used custom EDID with 1024x786 bin and observed
> > that the bin is able to load.
> > 
> > [    0.262973] [drm] No driver support for vblank timestamp query.
> > [    0.263842] [drm] Got built-in EDID base block and 0 extensions
> > from "edid/1024x768.bin" for connector
> 
> It's not really clear, is it displaying something?
> 

This smells like HDMI voltage regulator not being enabled. You have to include 
patch like this: 
https://github.com/Icenowy/linux/commit/
27d12cd2fe89f64c5f4d5224984d4cbfcb7ee137

I guess it won't apply as-is, since it's based on my old, out-of-tree hdmi 
driver.

Best regards,
Jernej

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jernej Škrabec]

Hi,

Dne torek, 24. april 2018 ob 15:34:12 CEST je Jagan Teki napisal(a):
> Allwinner A64 has display engine pipeline like other Allwinner SOC's
> A83T/H3/H5.
> 
> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0
> with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
> This series merely concentrated on HDMI pipeline and rest will add
> eventually.
> 
> patch 1: dt-bindings for a64 DE2 CCU
> 
> patch 2: a64 DE2 CCU node addition
> 
> patch 3: dt-bindings for a64 DE2 pipeline
> 
> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
> 
> patch 6: a64 DE2 pipeline node addition
> 
> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
> 
> patch 9: a64 HDMI nodes addition
> 
> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
> 
> patch 12: a64 HDMI pipeline
> 
> patch 13: enable HDMI out on bananpi-m64
> 
> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
> thread), able to detect the HDMI but, no penguins on screen.
> 
> Request for any suggestions.

You are mising sunxi-ng clock patches. PLL_VIDEO0 and PLL_VIDEO1 need fixes by 
setting minimum stable frequency. Please note that datasheet may have wrong 
information. That was obvious in H3 case and I had to check minimum stable 
PLL_VIDEO frequency in BSP driver.

Without clock fixes, you might not see anything on the screen.

Best regards,
Jernej

> 
> Test log on Bananpi-m64:
> [    0.247631] sun4i-drm display-engine: bound 1100000.mixer (ops
> sun8i_mixer_ops) [    0.256717] sun4i-drm display-engine: bound
> 1200000.mixer (ops sun8i_mixer_ops) [    0.256783] sun4i-tcon
> 1c0c000.lcd-controller: Missing LVDS properties, Please upgrade your DT [  
>  0.256792] sun4i-tcon 1c0c000.lcd-controller: LVDS output disabled [   
> 0.257081] sun4i-drm display-engine: No panel or bridge found... RGB output
> disabled [    0.257099] sun4i-drm display-engine: bound
> 1c0c000.lcd-controller (ops sun4i_tcon_ops) [    0.257273] sun4i-drm
> display-engine: No panel or bridge found... RGB output disabled [   
> 0.257288] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops
> sun4i_tcon_ops) [    0.258176] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX
> controller v1.32a with HDCP (sun8i_dw_hdmi_p) [    0.258596] sun8i-dw-hdmi
> 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver [    0.259188]
> sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops) [   
> 0.259199] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [   
> 0.259205] [drm] No driver support for vblank timestamp query. [   
> 0.259308] [drm] Cannot find any crtc or sizes
> [    0.259824] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine
> on minor 0
> 
> [1] https://lkml.org/lkml/2018/3/16/1096
> 
> Jagan Teki (13):
>   dt-bindings: clock: Add compatible for A64 DE2 CCU
>   arm64: dts: allwinner: a64: Add DE2 CCU
>   bindings: display: Add compatible for A64 DE2 pipeline
>   bindings: display: Add compatible for A64 Mixer0
>   bindings: display: Add compatible for A64 tcon-lcd
>   arm64: dts: allwinner: a64: Add DE2 pipeline
>   bindings: display: Add compatible for A64 HDMI
>   bindings: display: Add compatible for A64 HDMI PHY
>   arm64: dts: allwinner: a64: Add HDMI support
>   bindings: display: Add compatible for A64 Mixer1
>   bindings: display: Add compatible for A64 tcon-tv
>   arm64: dts: allwinner: a64: Add HDMI pipeline
>   arm64: dts: allwinner: a64: bananapi-m64: Enable HDMI output
> 
>  .../devicetree/bindings/clock/sun8i-de2.txt        |   1 +
>  .../bindings/display/sunxi/sun4i-drm.txt           |   7 +
>  .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  26 +++
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 181
> +++++++++++++++++++++ drivers/gpu/drm/sun4i/sun4i_drv.c                  | 
>  1 +
>  include/dt-bindings/clock/sun50i-a64-ccu.h         |   2 +
>  6 files changed, 218 insertions(+)
> 
> --
> 2.14.3

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jagan Teki]

On Tue, Apr 24, 2018 at 9:02 PM, Jernej Škrabec <jernej.skrabec@siol.net> wrote:
> Hi,
>
> Dne torek, 24. april 2018 ob 15:34:12 CEST je Jagan Teki napisal(a):
>> Allwinner A64 has display engine pipeline like other Allwinner SOC's
>> A83T/H3/H5.
>>
>> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0
>> with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
>> This series merely concentrated on HDMI pipeline and rest will add
>> eventually.
>>
>> patch 1: dt-bindings for a64 DE2 CCU
>>
>> patch 2: a64 DE2 CCU node addition
>>
>> patch 3: dt-bindings for a64 DE2 pipeline
>>
>> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
>>
>> patch 6: a64 DE2 pipeline node addition
>>
>> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
>>
>> patch 9: a64 HDMI nodes addition
>>
>> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
>>
>> patch 12: a64 HDMI pipeline
>>
>> patch 13: enable HDMI out on bananpi-m64
>>
>> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
>> thread), able to detect the HDMI but, no penguins on screen.
>>
>> Request for any suggestions.
>
> You are mising sunxi-ng clock patches. PLL_VIDEO0 and PLL_VIDEO1 need fixes by
> setting minimum stable frequency. Please note that datasheet may have wrong
> information. That was obvious in H3 case and I had to check minimum stable
> PLL_VIDEO frequency in BSP driver.

Can you point me the clock patches? I've phadled only CLK_PLL_VIDEO0
on hdmi_phy So we need CLK_PLL_VIDEO1 as fourth clock?

Jagan.

-- 
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jernej Škrabec]

Hi,

Dne sreda, 25. april 2018 ob 12:34:09 CEST je Jagan Teki napisal(a):
> On Tue, Apr 24, 2018 at 9:02 PM, Jernej Škrabec <jernej.skrabec@siol.net> 
wrote:
> > Hi,
> > 
> > Dne torek, 24. april 2018 ob 15:34:12 CEST je Jagan Teki napisal(a):
> >> Allwinner A64 has display engine pipeline like other Allwinner SOC's
> >> A83T/H3/H5.
> >> 
> >> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to
> >> tcon0 with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
> >> This series merely concentrated on HDMI pipeline and rest will add
> >> eventually.
> >> 
> >> patch 1: dt-bindings for a64 DE2 CCU
> >> 
> >> patch 2: a64 DE2 CCU node addition
> >> 
> >> patch 3: dt-bindings for a64 DE2 pipeline
> >> 
> >> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
> >> 
> >> patch 6: a64 DE2 pipeline node addition
> >> 
> >> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
> >> 
> >> patch 9: a64 HDMI nodes addition
> >> 
> >> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
> >> 
> >> patch 12: a64 HDMI pipeline
> >> 
> >> patch 13: enable HDMI out on bananpi-m64
> >> 
> >> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
> >> thread), able to detect the HDMI but, no penguins on screen.
> >> 
> >> Request for any suggestions.
> > 
> > You are mising sunxi-ng clock patches. PLL_VIDEO0 and PLL_VIDEO1 need
> > fixes by setting minimum stable frequency. Please note that datasheet may
> > have wrong information. That was obvious in H3 case and I had to check
> > minimum stable PLL_VIDEO frequency in BSP driver.
> 
> Can you point me the clock patches? 

Here is my A64 HDMI wip repo, which includes my clock changes:
https://github.com/jernejsk/linux-1/tree/a64_hdmi_wip

At some point HDMI output worked ok, I'm not sure in what state I left the 
code.

> I've phadled only CLK_PLL_VIDEO0
> on hdmi_phy So we need CLK_PLL_VIDEO1 as fourth clock?

I'm not sure what is the best way. I guess some research is needed. There is 
even the possibility that one bit (SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL) in hdmi 
phy needs to be toggled depending on which clock is selected as HDMI source. I 
never finished my research since I'm waiting to SRAM C claiming patches.

At the end, HDMI driver should be tested by both, PLL_VIDEO0 and PLL_VIDEO1 as 
a HDMI clock source, otherwise there is no guarantee that we got binding 
right. A83T, H3 and H5 has only one possible HDMI parent clock, so it was much 
easier in this regard.

Unfortunately, BSP driver is not much of a help, since it was always 
distributed as a blob. Disassembly looks much like H3 driver, with few bits 
added. However, BSP clocks are pretty much hardcoded so they don't tell all 
the story.

Best regards,
Jernej


-- 
You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org
For more options, visit https://groups.google.com/d/optout.

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jagan Teki]

On Wed, Apr 25, 2018 at 11:29 PM, Jernej Škrabec
<jernej.skrabec@siol.net> wrote:
> Hi,
>
> Dne sreda, 25. april 2018 ob 12:34:09 CEST je Jagan Teki napisal(a):
>> On Tue, Apr 24, 2018 at 9:02 PM, Jernej Škrabec <jernej.skrabec@siol.net>
> wrote:
>> > Hi,
>> >
>> > Dne torek, 24. april 2018 ob 15:34:12 CEST je Jagan Teki napisal(a):
>> >> Allwinner A64 has display engine pipeline like other Allwinner SOC's
>> >> A83T/H3/H5.
>> >>
>> >> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to
>> >> tcon0 with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI.
>> >> This series merely concentrated on HDMI pipeline and rest will add
>> >> eventually.
>> >>
>> >> patch 1: dt-bindings for a64 DE2 CCU
>> >>
>> >> patch 2: a64 DE2 CCU node addition
>> >>
>> >> patch 3: dt-bindings for a64 DE2 pipeline
>> >>
>> >> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
>> >>
>> >> patch 6: a64 DE2 pipeline node addition
>> >>
>> >> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
>> >>
>> >> patch 9: a64 HDMI nodes addition
>> >>
>> >> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
>> >>
>> >> patch 12: a64 HDMI pipeline
>> >>
>> >> patch 13: enable HDMI out on bananpi-m64
>> >>
>> >> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
>> >> thread), able to detect the HDMI but, no penguins on screen.
>> >>
>> >> Request for any suggestions.
>> >
>> > You are mising sunxi-ng clock patches. PLL_VIDEO0 and PLL_VIDEO1 need
>> > fixes by setting minimum stable frequency. Please note that datasheet may
>> > have wrong information. That was obvious in H3 case and I had to check
>> > minimum stable PLL_VIDEO frequency in BSP driver.
>>
>> Can you point me the clock patches?
>
> Here is my A64 HDMI wip repo, which includes my clock changes:
> https://github.com/jernejsk/linux-1/tree/a64_hdmi_wip
>
> At some point HDMI output worked ok, I'm not sure in what state I left the
> code.
>

Jernej, thanks for the regulator change in another mail, yes
bananapi-m64 has HVCC regulator for HDMI glue, with this I'm able to
see penguins on screen.

>> I've phadled only CLK_PLL_VIDEO0
>> on hdmi_phy So we need CLK_PLL_VIDEO1 as fourth clock?
>
> I'm not sure what is the best way. I guess some research is needed. There is
> even the possibility that one bit (SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL) in hdmi
> phy needs to be toggled depending on which clock is selected as HDMI source. I
> never finished my research since I'm waiting to SRAM C claiming patches.
>
> At the end, HDMI driver should be tested by both, PLL_VIDEO0 and PLL_VIDEO1 as
> a HDMI clock source, otherwise there is no guarantee that we got binding
> right. A83T, H3 and H5 has only one possible HDMI parent clock, so it was much
> easier in this regard.

>From Figure 3-3.Module Clock Diagram of
Allwinner_A64_User_Manual_V1.1.pdf clearly shows PLL_VIDEO1 is
connected TCON1 which intern used by HDMI. I've verified both
PLL_VIDEO0 and 1 both seems working. I'm thinking we can go for
PLL_VIDEO1 as per datasheet, any suggestions?

Jagan.

Re: [RFC 00/13] arm64: allwinner: Add A64 DE2 pipeline support

[Jernej Škrabec]

Hi,

Dne četrtek, 26. april 2018 ob 15:26:49 CEST je Jagan Teki napisal(a):
> On Wed, Apr 25, 2018 at 11:29 PM, Jernej Škrabec
> 
> <jernej.skrabec-gGgVlfcn5nU@public.gmane.org> wrote:
> > Hi,
> > 
> > Dne sreda, 25. april 2018 ob 12:34:09 CEST je Jagan Teki napisal(a):
> >> On Tue, Apr 24, 2018 at 9:02 PM, Jernej Škrabec <jernej.skrabec@siol.net>
> > 
> > wrote:
> >> > Hi,
> >> > 
> >> > Dne torek, 24. april 2018 ob 15:34:12 CEST je Jagan Teki napisal(a):
> >> >> Allwinner A64 has display engine pipeline like other Allwinner SOC's
> >> >> A83T/H3/H5.
> >> >> 
> >> >> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to
> >> >> tcon0 with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with
> >> >> HDMI.
> >> >> This series merely concentrated on HDMI pipeline and rest will add
> >> >> eventually.
> >> >> 
> >> >> patch 1: dt-bindings for a64 DE2 CCU
> >> >> 
> >> >> patch 2: a64 DE2 CCU node addition
> >> >> 
> >> >> patch 3: dt-bindings for a64 DE2 pipeline
> >> >> 
> >> >> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd
> >> >> 
> >> >> patch 6: a64 DE2 pipeline node addition
> >> >> 
> >> >> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY
> >> >> 
> >> >> patch 9: a64 HDMI nodes addition
> >> >> 
> >> >> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv
> >> >> 
> >> >> patch 12: a64 HDMI pipeline
> >> >> 
> >> >> patch 13: enable HDMI out on bananpi-m64
> >> >> 
> >> >> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1]
> >> >> thread), able to detect the HDMI but, no penguins on screen.
> >> >> 
> >> >> Request for any suggestions.
> >> > 
> >> > You are mising sunxi-ng clock patches. PLL_VIDEO0 and PLL_VIDEO1 need
> >> > fixes by setting minimum stable frequency. Please note that datasheet
> >> > may
> >> > have wrong information. That was obvious in H3 case and I had to check
> >> > minimum stable PLL_VIDEO frequency in BSP driver.
> >> 
> >> Can you point me the clock patches?
> > 
> > Here is my A64 HDMI wip repo, which includes my clock changes:
> > https://github.com/jernejsk/linux-1/tree/a64_hdmi_wip
> > 
> > At some point HDMI output worked ok, I'm not sure in what state I left the
> > code.
> 
> Jernej, thanks for the regulator change in another mail, yes
> bananapi-m64 has HVCC regulator for HDMI glue, with this I'm able to
> see penguins on screen.

Ok, great.

> 
> >> I've phadled only CLK_PLL_VIDEO0
> >> on hdmi_phy So we need CLK_PLL_VIDEO1 as fourth clock?
> > 
> > I'm not sure what is the best way. I guess some research is needed. There
> > is even the possibility that one bit (SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL)
> > in hdmi phy needs to be toggled depending on which clock is selected as
> > HDMI source. I never finished my research since I'm waiting to SRAM C
> > claiming patches.
> > 
> > At the end, HDMI driver should be tested by both, PLL_VIDEO0 and
> > PLL_VIDEO1 as a HDMI clock source, otherwise there is no guarantee that
> > we got binding right. A83T, H3 and H5 has only one possible HDMI parent
> > clock, so it was much easier in this regard.
> 
> From Figure 3-3.Module Clock Diagram of
> Allwinner_A64_User_Manual_V1.1.pdf clearly shows PLL_VIDEO1 is
> connected TCON1 which intern used by HDMI. I've verified both
> PLL_VIDEO0 and 1 both seems working. I'm thinking we can go for
> PLL_VIDEO1 as per datasheet, any suggestions?
> 
> Jagan.

Actually, same diagram also shows that PLL_VIDEO0 can be connected to TCON1/
HDMI. Since DT descibes HW, probably both phandles should be specified and 
driver should decide some way which one to select. Additionally, HDMI 
controller and HDMI PHY should use same PLL at the same time. If nothing is 
done, PLL_VIDEO0 will always be used, which might interfere in dual monitor 
setup.

Best regards,
Jernej



-- 
You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org
For more options, visit https://groups.google.com/d/optout.