[PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M

[PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M

[Fabrizio Castro]

Dear All,

This series is to add support for the Clocked Serial Interface (CSI)
IP found in the Renesas RZ/V2M SoC.

Thanks,
Fab

v2: edited list of include files in drivers/spi/spi-rzv2m-csi.c

Fabrizio Castro (5):
  spi: dt-bindings: Add bindings for RZ/V2M CSI
  clk: renesas: r9a09g011: Add CSI related clocks
  spi: Add support for Renesas CSI
  arm64: dts: renesas: r9a09g011: Add CSI nodes
  arm64: defconfig: Enable Renesas RZ/V2M CSI driver

 .../bindings/spi/renesas,rzv2m-csi.yaml       |  70 ++
 arch/arm64/boot/dts/renesas/r9a09g011.dtsi    |  28 +
 arch/arm64/configs/defconfig                  |   1 +
 drivers/clk/renesas/r9a09g011-cpg.c           |  15 +
 drivers/spi/Kconfig                           |   6 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-rzv2m-csi.c                   | 667 ++++++++++++++++++
 7 files changed, 788 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml
 create mode 100644 drivers/spi/spi-rzv2m-csi.c

-- 
2.34.1

[PATCH v2 1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI

[Fabrizio Castro]

Add dt-bindings for the CSI IP found inside the RZ/V2M SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---

v2: no changes

 .../bindings/spi/renesas,rzv2m-csi.yaml       | 70 +++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml

diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml
new file mode 100644
index 000000000000..e59183e53690
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/renesas,rzv2m-csi.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/renesas,rzv2m-csi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/V2M Clocked Serial Interface (CSI)
+
+maintainers:
+  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
+  - Geert Uytterhoeven <geert+renesas@glider.be>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    const: renesas,rzv2m-csi
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: The clock used to generate the output clock (CSICLK)
+      - description: Internal clock to access the registers (PCLK)
+
+  clock-names:
+    items:
+      - const: csiclk
+      - const: pclk
+
+  resets:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - resets
+  - power-domains
+  - '#address-cells'
+  - '#size-cells'
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/r9a09g011-cpg.h>
+    csi4: spi@a4020200 {
+        compatible = "renesas,rzv2m-csi";
+        reg = <0xa4020200 0x80>;
+        interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&cpg CPG_MOD R9A09G011_CSI4_CLK>,
+                 <&cpg CPG_MOD R9A09G011_CPERI_GRPH_PCLK>;
+        clock-names = "csiclk", "pclk";
+        resets = <&cpg R9A09G011_CSI_GPH_PRESETN>;
+        power-domains = <&cpg>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
-- 
2.34.1

[PATCH v2 4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes

[Fabrizio Castro]

The Renesas RZ/V2M comes with 6 Clocked Serial Interface (CSI)
IPs (CSI0, CSI1, CSI2, CSI3, CSI4, CSI5), but Linux is only
allowed access to CSI0 and CSI4.

This commit adds SoC specific device tree support for CSI0 and
CSI4.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
---

v2: no changes

 arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 28 ++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
index 46d67b200a66..33f2ecf42441 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
@@ -236,6 +236,34 @@ sys: system-controller@a3f03000 {
 			reg = <0 0xa3f03000 0 0x400>;
 		};
 
+		csi0: spi@a4020000 {
+			compatible = "renesas,rzv2m-csi";
+			reg = <0 0xa4020000 0 0x80>;
+			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A09G011_CSI0_CLK>,
+				 <&cpg CPG_MOD R9A09G011_CPERI_GRPG_PCLK>;
+			clock-names = "csiclk", "pclk";
+			resets = <&cpg R9A09G011_CSI_GPG_PRESETN>;
+			power-domains = <&cpg>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		csi4: spi@a4020200 {
+			compatible = "renesas,rzv2m-csi";
+			reg = <0 0xa4020200 0 0x80>;
+			interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A09G011_CSI4_CLK>,
+				 <&cpg CPG_MOD R9A09G011_CPERI_GRPH_PCLK>;
+			clock-names = "csiclk", "pclk";
+			resets = <&cpg R9A09G011_CSI_GPH_PRESETN>;
+			power-domains = <&cpg>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		i2c0: i2c@a4030000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.34.1

Re: [PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M

[Mark Brown]

On Thu, 22 Jun 2023 12:33:36 +0100, Fabrizio Castro wrote:
> This series is to add support for the Clocked Serial Interface (CSI)
> IP found in the Renesas RZ/V2M SoC.
> 
> Thanks,
> Fab
> 
> v2: edited list of include files in drivers/spi/spi-rzv2m-csi.c
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI
      commit: db63e7ad2895409f78a04f331f781baa7a879dd7
[2/5] clk: renesas: r9a09g011: Add CSI related clocks
      commit: 7c78eb3e5d30eaa217cecaa32711e41cd849d498
[3/5] spi: Add support for Renesas CSI
      commit: dcf92036cb3e1b7bf3472109e4290a0937b270dd
[4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes
      commit: ef643c6b57020ee279d18636d9d967ee048dbffa
[5/5] arm64: defconfig: Enable Renesas RZ/V2M CSI driver
      commit: dfbd12ae0e7c761e07369f5a2d55fe06eb54ad31

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

Re: [PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M

[Geert Uytterhoeven]

Hi Mark,

On Fri, Jun 23, 2023 at 2:32 AM Mark Brown <broonie@kernel.org> wrote:
> On Thu, 22 Jun 2023 12:33:36 +0100, Fabrizio Castro wrote:
> > This series is to add support for the Clocked Serial Interface (CSI)
> > IP found in the Renesas RZ/V2M SoC.
> >
> > Thanks,
> > Fab
> >
> > v2: edited list of include files in drivers/spi/spi-rzv2m-csi.c
> >
> > [...]
>
> Applied to
>
>    https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
>
> Thanks!
>
> [1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI
>       commit: db63e7ad2895409f78a04f331f781baa7a879dd7
> [2/5] clk: renesas: r9a09g011: Add CSI related clocks
>       commit: 7c78eb3e5d30eaa217cecaa32711e41cd849d498
> [3/5] spi: Add support for Renesas CSI
>       commit: dcf92036cb3e1b7bf3472109e4290a0937b270dd
> [4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes
>       commit: ef643c6b57020ee279d18636d9d967ee048dbffa
> [5/5] arm64: defconfig: Enable Renesas RZ/V2M CSI driver
>       commit: dfbd12ae0e7c761e07369f5a2d55fe06eb54ad31

I hoped this would have been a bug in b4 thanks, but unfortunately it
is not.

Please do not apply unreviewed clock, DTS, and defconfig patches to
your tree.  These are intended to go upstream through the renesas-clk
and clk, renesas-dt and soc, resp. renesas-defconfig and soc trees.

Thanks for your understanding!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 1278 bytes --]

On Fri, Jun 23, 2023 at 08:49:05AM +0200, Geert Uytterhoeven wrote:
> On Fri, Jun 23, 2023 at 2:32 AM Mark Brown <broonie@kernel.org> wrote:

> > [1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI
> >       commit: db63e7ad2895409f78a04f331f781baa7a879dd7
> > [2/5] clk: renesas: r9a09g011: Add CSI related clocks
> >       commit: 7c78eb3e5d30eaa217cecaa32711e41cd849d498
> > [3/5] spi: Add support for Renesas CSI
> >       commit: dcf92036cb3e1b7bf3472109e4290a0937b270dd
> > [4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes
> >       commit: ef643c6b57020ee279d18636d9d967ee048dbffa
> > [5/5] arm64: defconfig: Enable Renesas RZ/V2M CSI driver
> >       commit: dfbd12ae0e7c761e07369f5a2d55fe06eb54ad31
> 
> I hoped this would have been a bug in b4 thanks, but unfortunately it
> is not.
> 
> Please do not apply unreviewed clock, DTS, and defconfig patches to
> your tree.  These are intended to go upstream through the renesas-clk
> and clk, renesas-dt and soc, resp. renesas-defconfig and soc trees.

Sorry, the series was only partially copied to me so it wasn't very
visible that there were other patches - I just saw a simple 2 patch
series in my inbox and it's not terribly visible in the rest of the
process that there's more patches.

[-- Attachment #2: signature.asc --]
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Re: (subset) [PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M

[Mark Brown]

On Thu, 22 Jun 2023 12:33:36 +0100, Fabrizio Castro wrote:
> This series is to add support for the Clocked Serial Interface (CSI)
> IP found in the Renesas RZ/V2M SoC.
> 
> Thanks,
> Fab
> 
> v2: edited list of include files in drivers/spi/spi-rzv2m-csi.c
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI
      commit: db63e7ad2895409f78a04f331f781baa7a879dd7
[3/5] spi: Add support for Renesas CSI
      commit: dcf92036cb3e1b7bf3472109e4290a0937b270dd

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

Re: [PATCH v2 1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI

[Geert Uytterhoeven]

On Thu, Jun 22, 2023 at 1:34 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> Add dt-bindings for the CSI IP found inside the RZ/V2M SoC.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>
> v2: no changes

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes

[Geert Uytterhoeven]

On Thu, Jun 22, 2023 at 1:34 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> The Renesas RZ/V2M comes with 6 Clocked Serial Interface (CSI)
> IPs (CSI0, CSI1, CSI2, CSI3, CSI4, CSI5), but Linux is only
> allowed access to CSI0 and CSI4.
>
> This commit adds SoC specific device tree support for CSI0 and
> CSI4.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> ---
>
> v2: no changes

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.6.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds