* [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs [not found] <20250801084825.471011-1-tommaso.merciai.xr@bp.renesas.com> @ 2025-08-01 8:48 ` Tommaso Merciai 2025-08-01 19:29 ` Conor Dooley ` (2 more replies) 2025-08-01 8:48 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add DMAC nodes Tommaso Merciai 1 sibling, 3 replies; 7+ messages in thread From: Tommaso Merciai @ 2025-08-01 8:48 UTC (permalink / raw) To: tomm.merciai Cc: linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Tommaso Merciai, Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Magnus Damm, dmaengine, devicetree, linux-kernel, linux-clk The DMAC block on the RZ/G3E SoC is identical to the one found on the RZ/V2H(P) SoC. No driver changes are required, as `renesas,r9a09g057-dmac` will be used as a fallback compatible string on the RZ/G3E SoC. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> --- Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index 92b12762c472..f891cfcc48c7 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -21,6 +21,11 @@ properties: - renesas,r9a08g045-dmac # RZ/G3S - const: renesas,rz-dmac + - items: + - enum: + - renesas,r9a09g047-dmac # RZ/G3E + - const: renesas,r9a09g057-dmac + - const: renesas,r9a09g057-dmac # RZ/V2H(P) reg: -- 2.43.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs 2025-08-01 8:48 ` [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs Tommaso Merciai @ 2025-08-01 19:29 ` Conor Dooley 2025-08-04 12:43 ` Geert Uytterhoeven 2025-08-20 17:33 ` Vinod Koul 2 siblings, 0 replies; 7+ messages in thread From: Conor Dooley @ 2025-08-01 19:29 UTC (permalink / raw) To: Tommaso Merciai Cc: tomm.merciai, linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Magnus Damm, dmaengine, devicetree, linux-kernel, linux-clk [-- Attachment #1: Type: text/plain, Size: 427 bytes --] On Fri, Aug 01, 2025 at 10:48:22AM +0200, Tommaso Merciai wrote: > The DMAC block on the RZ/G3E SoC is identical to the one found on the > RZ/V2H(P) SoC. > > No driver changes are required, as `renesas,r9a09g057-dmac` will be used > as a fallback compatible string on the RZ/G3E SoC. > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > --- Acked-by: Conor Dooley <conor.dooley@microchip.com> [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs 2025-08-01 8:48 ` [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs Tommaso Merciai 2025-08-01 19:29 ` Conor Dooley @ 2025-08-04 12:43 ` Geert Uytterhoeven 2025-08-20 17:33 ` Vinod Koul 2 siblings, 0 replies; 7+ messages in thread From: Geert Uytterhoeven @ 2025-08-04 12:43 UTC (permalink / raw) To: Tommaso Merciai Cc: tomm.merciai, linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Michael Turquette, Stephen Boyd, Magnus Damm, dmaengine, devicetree, linux-kernel, linux-clk On Fri, 1 Aug 2025 at 10:49, Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> wrote: > The DMAC block on the RZ/G3E SoC is identical to the one found on the > RZ/V2H(P) SoC. > > No driver changes are required, as `renesas,r9a09g057-dmac` will be used > as a fallback compatible string on the RZ/G3E SoC. > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs 2025-08-01 8:48 ` [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs Tommaso Merciai 2025-08-01 19:29 ` Conor Dooley 2025-08-04 12:43 ` Geert Uytterhoeven @ 2025-08-20 17:33 ` Vinod Koul 2025-08-21 7:32 ` Geert Uytterhoeven 2 siblings, 1 reply; 7+ messages in thread From: Vinod Koul @ 2025-08-20 17:33 UTC (permalink / raw) To: Tommaso Merciai Cc: tomm.merciai, linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Magnus Damm, dmaengine, devicetree, linux-kernel, linux-clk On 01-08-25, 10:48, Tommaso Merciai wrote: > The DMAC block on the RZ/G3E SoC is identical to the one found on the > RZ/V2H(P) SoC. > > No driver changes are required, as `renesas,r9a09g057-dmac` will be used > as a fallback compatible string on the RZ/G3E SoC. I seem to have only 2/3 w.o cover, nothing in pw too...? > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > --- > Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > index 92b12762c472..f891cfcc48c7 100644 > --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml > @@ -21,6 +21,11 @@ properties: > - renesas,r9a08g045-dmac # RZ/G3S > - const: renesas,rz-dmac > > + - items: > + - enum: > + - renesas,r9a09g047-dmac # RZ/G3E > + - const: renesas,r9a09g057-dmac > + > - const: renesas,r9a09g057-dmac # RZ/V2H(P) > > reg: > -- > 2.43.0 -- ~Vinod ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs 2025-08-20 17:33 ` Vinod Koul @ 2025-08-21 7:32 ` Geert Uytterhoeven 0 siblings, 0 replies; 7+ messages in thread From: Geert Uytterhoeven @ 2025-08-21 7:32 UTC (permalink / raw) To: Vinod Koul Cc: Tommaso Merciai, tomm.merciai, linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Michael Turquette, Stephen Boyd, Magnus Damm, dmaengine, devicetree, linux-kernel, linux-clk Hi Vinod, On Wed, 20 Aug 2025 at 19:33, Vinod Koul <vkoul@kernel.org> wrote: > On 01-08-25, 10:48, Tommaso Merciai wrote: > > The DMAC block on the RZ/G3E SoC is identical to the one found on the > > RZ/V2H(P) SoC. > > > > No driver changes are required, as `renesas,r9a09g057-dmac` will be used > > as a fallback compatible string on the RZ/G3E SoC. > > I seem to have only 2/3 w.o cover, nothing in pw too...? Lore has the full series: https://lore.kernel.org/all/20250801084825.471011-1-tommaso.merciai.xr@bp.renesas.com/ Only patch 2/3 was meant for you. Patches 1/3 and 3/3 are clk and DTS patches, which I have already applied to my renesas-clk and renesas-devel trees, as the new DT binding is straightforward. Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add DMAC nodes [not found] <20250801084825.471011-1-tommaso.merciai.xr@bp.renesas.com> 2025-08-01 8:48 ` [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs Tommaso Merciai @ 2025-08-01 8:48 ` Tommaso Merciai 2025-08-04 13:05 ` Geert Uytterhoeven 1 sibling, 1 reply; 7+ messages in thread From: Tommaso Merciai @ 2025-08-01 8:48 UTC (permalink / raw) To: tomm.merciai Cc: linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Tommaso Merciai, Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Michael Turquette, Stephen Boyd, devicetree, linux-kernel, linux-clk Add nodes for the DMAC IPs found on the Renesas RZ/G3E SoC. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 170 +++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index e4fac7e0d764..eeccd1345f71 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -301,6 +301,176 @@ xspi: spi@11030000 { status = "disabled"; }; + dmac0: dma-controller@11400000 { + compatible = "renesas,r9a09g047-dmac", + "renesas,r9a09g057-dmac"; + reg = <0 0x11400000 0 0x10000>; + interrupts = <GIC_SPI 499 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 101 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 104 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 0x0>; + power-domains = <&cpg>; + resets = <&cpg 0x31>; + #dma-cells = <1>; + dma-channels = <16>; + renesas,icu = <&icu 4>; + }; + + dmac1: dma-controller@14830000 { + compatible = "renesas,r9a09g047-dmac", + "renesas,r9a09g057-dmac"; + reg = <0 0x14830000 0 0x10000>; + interrupts = <GIC_SPI 495 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 0x1>; + power-domains = <&cpg>; + resets = <&cpg 0x32>; + #dma-cells = <1>; + dma-channels = <16>; + renesas,icu = <&icu 0>; + }; + + dmac2: dma-controller@14840000 { + compatible = "renesas,r9a09g047-dmac", + "renesas,r9a09g057-dmac"; + reg = <0 0x14840000 0 0x10000>; + interrupts = <GIC_SPI 496 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 53 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 54 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 0x2>; + power-domains = <&cpg>; + resets = <&cpg 0x33>; + #dma-cells = <1>; + dma-channels = <16>; + renesas,icu = <&icu 1>; + }; + + dmac3: dma-controller@12000000 { + compatible = "renesas,r9a09g047-dmac", + "renesas,r9a09g057-dmac"; + reg = <0 0x12000000 0 0x10000>; + interrupts = <GIC_SPI 497 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 60 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 61 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 62 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 63 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 65 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 69 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 71 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 0x3>; + power-domains = <&cpg>; + resets = <&cpg 0x34>; + #dma-cells = <1>; + dma-channels = <16>; + renesas,icu = <&icu 2>; + }; + + dmac4: dma-controller@12010000 { + compatible = "renesas,r9a09g047-dmac", + "renesas,r9a09g057-dmac"; + reg = <0 0x12010000 0 0x10000>; + interrupts = <GIC_SPI 498 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 81 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 83 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 0x4>; + power-domains = <&cpg>; + resets = <&cpg 0x35>; + #dma-cells = <1>; + dma-channels = <16>; + renesas,icu = <&icu 3>; + }; + scif0: serial@11c01400 { compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057"; reg = <0 0x11c01400 0 0x400>; -- 2.43.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add DMAC nodes 2025-08-01 8:48 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add DMAC nodes Tommaso Merciai @ 2025-08-04 13:05 ` Geert Uytterhoeven 0 siblings, 0 replies; 7+ messages in thread From: Geert Uytterhoeven @ 2025-08-04 13:05 UTC (permalink / raw) To: Tommaso Merciai Cc: tomm.merciai, linux-renesas-soc, biju.das.jz, prabhakar.mahadev-lad.rj, Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Michael Turquette, Stephen Boyd, devicetree, linux-kernel, linux-clk On Fri, 1 Aug 2025 at 10:49, Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> wrote: > Add nodes for the DMAC IPs found on the Renesas RZ/G3E SoC. > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.18. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
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2025-08-01 8:48 ` [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs Tommaso Merciai
2025-08-01 19:29 ` Conor Dooley
2025-08-04 12:43 ` Geert Uytterhoeven
2025-08-20 17:33 ` Vinod Koul
2025-08-21 7:32 ` Geert Uytterhoeven
2025-08-01 8:48 ` [PATCH 3/3] arm64: dts: renesas: r9a09g047: Add DMAC nodes Tommaso Merciai
2025-08-04 13:05 ` Geert Uytterhoeven
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