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[209.85.221.175]) by smtp.gmail.com with ESMTPSA id 71dfb90a1353d-538e28c3ae3sm2712986e0c.35.2025.07.30.06.24.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Jul 2025 06:24:28 -0700 (PDT) Received: by mail-vk1-f175.google.com with SMTP id 71dfb90a1353d-5392bf8b590so170708e0c.3; Wed, 30 Jul 2025 06:24:28 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCUdO5yBUfHvMr4y6YuSV5HVYxL8r8pZVa+RJaDxExWzTqDX/+pgeOqacWv3qH6ffRiqJy+yl/Lx02Ft@vger.kernel.org, AJvYcCUmq4JXMpi8ub3l5Abypa5ltadH14OpPeU5aJKb5XpLhcQv7yEao90L66Rf/BAecUI9jXeC/z8vDL6wBQBM@vger.kernel.org X-Received: by 2002:a05:6102:3e86:b0:4f7:c5ed:209c with SMTP id ada2fe7eead31-4fbe7f4e9ffmr2003997137.7.1753881867520; Wed, 30 Jul 2025 06:24:27 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <175232755943.19062.8739774784256290646.sendpatchset@1.0.0.127.in-addr.arpa> <175232759314.19062.13901247607746044271.sendpatchset@1.0.0.127.in-addr.arpa> In-Reply-To: <175232759314.19062.13901247607746044271.sendpatchset@1.0.0.127.in-addr.arpa> From: Geert Uytterhoeven Date: Wed, 30 Jul 2025 15:24:16 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: Ac12FXxhzlq35FsMSZHQohBFv9YKQP681byzw4XyIBQRdWgBYvzlVwmuc0Zg5QE Message-ID: Subject: Re: [PATCH v2 3/4] memory: renesas-rpc-if: Add RZ/A1 and RZ/A2 support To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, robh@kernel.org, geert+renesas@glider.be, devicetree@vger.kernel.org, conor+dt@kernel.org, krzk@kernel.org, linux-kernel@vger.kernel.org, wsa+renesas@sang-engineering.com, sergei.shtylyov@gmail.com, p.zabel@pengutronix.de Content-Type: text/plain; charset="UTF-8" Hi Magnus, On Sat, 12 Jul 2025 at 15:39, Magnus Damm wrote: > From: Magnus Damm > > Add RZ/A1 and RZ/A2 compat strings to the rpc-if driver. Also make the > reset controller optional. This is because RZ/A1 does not have any reset > bits assigned to the device so there is no reset controller available. > > Signed-off-by: Magnus Damm Thanks for your patch! > --- 0001/drivers/memory/renesas-rpc-if.c > +++ work/drivers/memory/renesas-rpc-if.c 2025-07-11 03:45:25.605098312 +0900 > @@ -234,7 +234,7 @@ static int rpcif_hw_init_impl(struct rpc > int ret; > > if (rpc->info->type == RPCIF_RZ_G2L) { > - ret = reset_control_reset(rpc->rstc); > + ret = rpc->rstc ? reset_control_reset(rpc->rstc) : 0; No need for this, as reset_control_reset() does nothing in case an optional reset is not present. > if (ret) > return ret; > usleep_range(200, 300); > @@ -614,7 +614,7 @@ static int rpcif_manual_xfer_impl(struct > return ret; > > err_out: > - if (reset_control_reset(rpc->rstc)) > + if (rpc->rstc && reset_control_reset(rpc->rstc)) Likewise. > dev_err(rpc->dev, "Failed to reset HW\n"); > rpcif_hw_init_impl(rpc, rpc->bus_size == 2); > return ret; > @@ -1017,7 +1017,7 @@ static int rpcif_probe(struct platform_d > rpc->size = resource_size(res); > rpc->rstc = devm_reset_control_array_get_exclusive(dev); > if (IS_ERR(rpc->rstc)) > - return PTR_ERR(rpc->rstc); > + rpc->rstc = NULL; Errors should be propagated correctly, also for probe deferral. devm_reset_control_array_get_optional_exclusive() is what you are looking for. You can enforce the presence of the resets where needed through the DT bindings. > > /* > * The enabling/disabling of spi/spix2 clocks at runtime leading to Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds