From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 4/6] arm64: dts: renesas: r9a09g087: Add SDHI nodes
Date: Thu, 3 Jul 2025 11:56:41 +0200 [thread overview]
Message-ID: <CAMuHMdUuqwo5Q2SuB=GBMLVYr1yNTB0hoOCohV=HeQ09NE32xw@mail.gmail.com> (raw)
In-Reply-To: <20250625153042.159690-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi Prabhakar,
On Wed, 25 Jun 2025 at 17:31, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add SDHI0-SDHI1 nodes to RZ/N2H ("R9A09G087") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> @@ -155,6 +155,46 @@ gic: interrupt-controller@83000000 {
> interrupt-controller;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> };
> +
> + sdhi0: mmc@92080000 {
> + compatible = "renesas,sdhi-r9a09g087",
> + "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x92080000 0 0x10000>;
> + interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1212>,
1112?
> + <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
> + clock-names = "aclk", "clkh";
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + sdhi0_vqmmc: vqmmc-regulator {
> + regulator-name = "SDHI0-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + status = "disabled";
> + };
> + };
> +
> + sdhi1: mmc@92090000 {
> + compatible = "renesas,sdhi-r9a09g087",
> + "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x92090000 0 0x10000>;
> + interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1213>,
1113?
> + <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
> + clock-names = "aclk", "clkh";
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + sdhi1_vqmmc: vqmmc-regulator {
> + regulator-name = "SDHI1-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + status = "disabled";
> + };
> + };
> };
>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2025-07-03 9:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 15:30 [PATCH 0/6] arm64: dts: renesas: Add I2C and SDHI nodes for RZ/T2H and RZ/N2H SoCs Prabhakar
2025-06-25 15:30 ` [PATCH 1/6] arm64: dts: renesas: r9a09g077: Add I2C controller nodes Prabhakar
2025-07-03 9:45 ` Geert Uytterhoeven
2025-07-03 23:51 ` Lad, Prabhakar
2025-06-25 15:30 ` [PATCH 2/6] arm64: dts: renesas: r9a09g087: " Prabhakar
2025-07-03 9:50 ` Geert Uytterhoeven
2025-06-25 15:30 ` [PATCH 3/6] arm64: dts: renesas: r9a09g077: Add SDHI nodes Prabhakar
2025-07-03 9:55 ` Geert Uytterhoeven
2025-07-03 23:52 ` Lad, Prabhakar
2025-07-04 17:12 ` Lad, Prabhakar
2025-07-07 9:47 ` Geert Uytterhoeven
2025-06-25 15:30 ` [PATCH 4/6] arm64: dts: renesas: r9a09g087: " Prabhakar
2025-07-03 9:56 ` Geert Uytterhoeven [this message]
2025-07-07 9:48 ` Geert Uytterhoeven
2025-06-25 15:30 ` [PATCH 5/6] arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Add user LEDs Prabhakar
2025-06-25 15:30 ` [PATCH 6/6] arm64: dts: renesas: r9a09g087m44-rzn2h-evk: " Prabhakar
2025-06-26 14:26 ` [PATCH 0/6] arm64: dts: renesas: Add I2C and SDHI nodes for RZ/T2H and RZ/N2H SoCs Geert Uytterhoeven
2025-06-27 12:53 ` Lad, Prabhakar
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