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[209.85.222.43]) by smtp.gmail.com with ESMTPSA id a1e0cc1a2514c-937611bfdfesm619457241.13.2025.11.13.06.28.41 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Nov 2025 06:28:41 -0800 (PST) Received: by mail-ua1-f43.google.com with SMTP id a1e0cc1a2514c-9371aca0a4dso550452241.1 for ; Thu, 13 Nov 2025 06:28:41 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCWxeX4mCrdJSrd9TEpWxMzBO7trZAq7dJEOwVEDsnLPOMGC+Td6vB1eEWhVNLZkTX3mliN6YsHBXGwf@vger.kernel.org X-Received: by 2002:a05:6102:4b85:b0:5df:af0f:308c with SMTP id ada2fe7eead31-5dfaf0f34c8mr2015901137.38.1763044121413; Thu, 13 Nov 2025 06:28:41 -0800 (PST) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20251020143107.13974-1-ovidiu.panait.rb@renesas.com> <20251020143107.13974-4-ovidiu.panait.rb@renesas.com> In-Reply-To: <20251020143107.13974-4-ovidiu.panait.rb@renesas.com> From: Geert Uytterhoeven Date: Thu, 13 Nov 2025 15:28:30 +0100 X-Gmail-Original-Message-ID: X-Gm-Features: AWmQ_bnUzqLPji7mNY2mLpWw72wOSZDLLWSl0uz9lB3HUP0ZZ52peqFQbz3UfMc Message-ID: Subject: Re: [PATCH v2 3/3] arm64: dts: renesas: r9a09g057: Add TSU nodes To: Ovidiu Panait Cc: john.madieu.xa@bp.renesas.com, rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org Content-Type: text/plain; charset="UTF-8" On Mon, 20 Oct 2025 at 16:31, Ovidiu Panait wrote: > The Renesas RZ/V2H SoC includes a Thermal Sensor Unit (TSU) block designed > to measure the junction temperature. The device provides real-time > temperature measurements for thermal management, utilizing two dedicated > channels for temperature sensing: > - TSU0, which is located near the DRP-AI block > - TSU1, which is located near the CPU and DRP-AI block > > Since TSU1 is physically closer the CPU and the highest temperature > spot, it is used for CPU throttling through a passive trip and cooling > map. TSU0 is configured only with a critical trip. > > Add TSU nodes along with thermal zones and keep them enabled in the SoC > DTSI. > > Signed-off-by: Ovidiu Panait Reviewed-by: Geert Uytterhoeven i.e. will queue in renesas-devel for v6.19. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds