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[209.85.222.42]) by smtp.gmail.com with ESMTPSA id a1e0cc1a2514c-95ce0902d6dsm4791788241.6.2026.05.04.01.19.52 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 May 2026 01:19:52 -0700 (PDT) Received: by mail-ua1-f42.google.com with SMTP id a1e0cc1a2514c-95cc3522c40so2437820241.2 for ; Mon, 04 May 2026 01:19:52 -0700 (PDT) X-Forwarded-Encrypted: i=1; AFNElJ/nyZ11sTtPrAu8t3mK7nqP9l7qmLhi1oP1qHNSNLW1YWCCwrARl8/uDMa1L29biNcX+HrLc61hx5+T@vger.kernel.org X-Received: by 2002:a05:6102:809e:b0:605:6089:674a with SMTP id ada2fe7eead31-62d8754d144mr3013701137.23.1777882792441; Mon, 04 May 2026 01:19:52 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20260503154439.27362-1-marek.vasut+renesas@mailbox.org> <20260503-vagabond-barge-dac8ececfc11@spud> In-Reply-To: <20260503-vagabond-barge-dac8ececfc11@spud> From: Geert Uytterhoeven Date: Mon, 4 May 2026 10:19:40 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AVHnY4L_7YXtlo4qE1y_LYqC7rM20qjGgpwaQzzNh45fY7gYtsmwSqrimcTuATY Message-ID: Subject: Re: [PATCH] schemas: Allow clocks: property in cache nodes To: Conor Dooley Cc: Marek Vasut , devicetree@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Rob Herring , linux-renesas-soc@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Hi Conor, On Sun, 3 May 2026 at 20:09, Conor Dooley wrote: > On Sun, May 03, 2026 at 05:44:13PM +0200, Marek Vasut wrote: > > Renesas R-Mobile APE6 currently describes clock which supply the cache > > controller in their DT using "clocks" property. This is not the only > > hardware that has cache controller clock controllable via some sort of > > clock controller, for example Altera SoCFPGA Cyclone V and Arria V also > > has controllable cache controller clock. Allow clocks: property in cache > > controller node to allow users to fully describe such hardware. > > Hmm, shouldn't these cache controllers have dedicated bindings that > enforce their clock requirements? Just a few general comments: - All electronics needs power, so "power-domains" should always be permitted, - All synchronous logic needs a clock, so "clocks" should always be permitteded, - All reasonably complex circuits need a reset, so "resets" should always be permitted. > > Signed-off-by: Marek Vasut As I have sent the same patch before[1]: Acked-by: Geert Uytterhoeven > > --- a/dtschema/schemas/cache.yaml > > +++ b/dtschema/schemas/cache.yaml > > @@ -33,6 +33,9 @@ properties: > > compatible: > > const: cache > > > > + clocks: > > + maxItems: 1 > > + > > power-domains: > > maxItems: 1 [1] https://lore.kernel.org/20260113075243.1192477-1-geert+renesas@glider.be/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds