From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
lpieralisi@kernel.org, robh+dt@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, bhelgaas@google.com,
kishon@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, marek.vasut+renesas@gmail.com,
fancer.lancer@gmail.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v20 14/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host
Date: Thu, 31 Aug 2023 15:12:42 +0200 [thread overview]
Message-ID: <CAMuHMdV7Qxjs+84E_Ht=d2EvBMYwwPxviT-DaT4-2m4Ds_+tdw@mail.gmail.com> (raw)
In-Reply-To: <20230825093219.2685912-15-yoshihiro.shimoda.uh@renesas.com>
Hi Shimoda-san,
On Fri, Aug 25, 2023 at 3:18 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Document bindings for Renesas R-Car Gen4 and R-Car S4-8 (R8A779F0)
> PCIe host module.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
> @@ -0,0 +1,123 @@
> + resets:
> + maxItems: 1
> +
> + resets-names:
reset-names
> + items:
> + - const: pwr
> +
> + max-link-speed:
> + maximum: 4
> +
> + num-lanes:
> + maximum: 4
> +
> +required:
> + - compatible
> + - reg
Missing "reg-names".
> + - interrupts
> + - clocks
> + - clock-names
> + - power-domains
> + - resets
> + - reset-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/r8a779f0-sysc.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pcie: pcie@e65d0000 {
> + compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie";
> + reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
> + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> + <0 0xe65d6200 0 0x0e00>, <0 0xfe000000 0 0x400000>;
The lenght "0x0e00" does not match your DTS patch
https://lore.kernel.org/linux-renesas-soc/20230828041434.2747699-2-yoshihiro.shimoda.uh@renesas.com
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "config";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
> + <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
> + dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
> + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
What about SPI 419, 420, 421?
> + interrupt-names = "msi", "dma", "sft_ce", "app";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 624>, <&clkref>;
> + clock-names = "core", "ref";
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 624>;
> + reset-names = "pwr";
> + num-lanes = <2>;
> + snps,enable-cdm-check;
> + max-link-speed = <4>;
> + };
> + };
BTW, I think it would be good to make the order of the properties and
in the example match between the host and endpoint bindings, to make
the output of
"diff Documentation/devicetree/bindings/pci/rcar-gen4-pci-{host,ep}.yaml"
as small as possible.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
> + - interrupts
> + - clocks
> + - clock-names
> + - power-domains
> + - resets
> + - reset-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/r8a779f0-sysc.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pcie: pcie@e65d0000 {
> + compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie";
> + reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
> + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> + <0 0xe65d6200 0 0x0e00>, <0 0xfe000000 0 0x400000>;
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "config";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
> + <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
> + dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
> + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 624>, <&clkref>;
> + clock-names = "core", "ref";
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 624>;
> + reset-names = "pwr";
> + num-lanes = <2>;
> + snps,enable-cdm-check;
> + max-link-speed = <4>;
> + };
> + };
> --
> 2.25.1
>
--
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2023-08-31 13:13 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-25 9:32 [PATCH v20 00/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 01/19] PCI: Add INTx Mechanism Messages macros Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 02/19] PCI: dwc: Change arguments of dw_pcie_prog_outbound_atu() Yoshihiro Shimoda
2024-01-29 22:42 ` Frank Li
2024-01-30 0:46 ` Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 03/19] PCI: dwc: Add outbound MSG TLPs support Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 04/19] PCI: designware-ep: Add INTx IRQs support Yoshihiro Shimoda
2023-09-13 23:31 ` Bjorn Helgaas
2023-09-14 7:56 ` Yoshihiro Shimoda
2023-09-15 21:23 ` Bjorn Helgaas
2023-09-19 7:22 ` Yoshihiro Shimoda
2023-09-19 10:39 ` Bjorn Helgaas
2023-09-19 11:55 ` Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 05/19] PCI: dwc: endpoint: Add multiple PFs support for dbi2 Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 06/19] PCI: dwc: Add dw_pcie_link_set_max_link_width() Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 07/19] PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling Yoshihiro Shimoda
2023-09-14 16:00 ` Bjorn Helgaas
2023-09-14 20:48 ` Serge Semin
2023-09-14 20:59 ` Bjorn Helgaas
2023-09-14 21:25 ` Serge Semin
2023-08-25 9:32 ` [PATCH v20 08/19] PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 09/19] PCI: dwc: Add EDMA_UNROLL capability flag Yoshihiro Shimoda
2023-09-14 16:09 ` Bjorn Helgaas
2023-09-14 21:07 ` Serge Semin
2023-08-25 9:32 ` [PATCH v20 10/19] PCI: dwc: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 11/19] PCI: dwc: Expose dw_pcie_write_dbi2() " Yoshihiro Shimoda
2023-08-25 18:18 ` Serge Semin
2023-08-25 9:32 ` [PATCH v20 12/19] PCI: dwc: endpoint: Introduce .pre_init() and .deinit() Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 13/19] dt-bindings: PCI: dwc: Update maxItems of reg and reg-names Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 14/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2023-08-31 13:12 ` Geert Uytterhoeven [this message]
2023-09-01 1:13 ` Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 15/19] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2023-08-31 13:16 ` Geert Uytterhoeven
2023-09-01 1:13 ` Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 16/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2023-09-14 16:34 ` Bjorn Helgaas
2023-09-15 9:37 ` Yoshihiro Shimoda
2023-09-15 20:38 ` Bjorn Helgaas
2023-09-19 7:03 ` Yoshihiro Shimoda
2023-09-14 16:58 ` Bjorn Helgaas
2023-09-15 9:37 ` Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 17/19] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 18/19] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
2023-08-25 9:32 ` [PATCH v20 19/19] misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller Yoshihiro Shimoda
2023-08-25 18:27 ` [PATCH v20 00/19] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Serge Semin
2023-08-27 6:59 ` Krzysztof Wilczyński
2023-08-28 1:19 ` Yoshihiro Shimoda
2023-08-28 6:37 ` manivannan.sadhasivam
2023-08-28 13:58 ` Serge Semin
2023-08-29 12:02 ` Yoshihiro Shimoda
2023-08-28 16:07 ` Krzysztof Wilczyński
2023-08-29 12:13 ` Yoshihiro Shimoda
2023-08-27 16:27 ` Krzysztof Wilczyński
2023-08-31 1:34 ` Yoshihiro Shimoda
2023-08-31 14:04 ` Krzysztof Wilczyński
2023-09-01 0:20 ` Yoshihiro Shimoda
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