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[209.85.128.170]) by smtp.gmail.com with ESMTPSA id e18-20020a25e712000000b00d9b33e0b952sm239356ybh.8.2023.10.19.05.18.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Oct 2023 05:18:33 -0700 (PDT) Received: by mail-yw1-f170.google.com with SMTP id 00721157ae682-5a7db1f864bso94391437b3.3; Thu, 19 Oct 2023 05:18:33 -0700 (PDT) X-Received: by 2002:a0d:cac5:0:b0:5a7:d9f9:2285 with SMTP id m188-20020a0dcac5000000b005a7d9f92285mr2064819ywd.26.1697717913323; Thu, 19 Oct 2023 05:18:33 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <01c234379a48f89df5150fa2b5eae867df08d858.1697199949.git.ysato@users.sourceforge.jp> In-Reply-To: <01c234379a48f89df5150fa2b5eae867df08d858.1697199949.git.ysato@users.sourceforge.jp> From: Geert Uytterhoeven Date: Thu, 19 Oct 2023 14:18:22 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC PATCH v3 26/35] arch/sh/boot/dts: SH7751R SoC Internal peripheral definition dtsi. To: Yoshinori Sato Cc: linux-sh@vger.kernel.org, glaubitz@physik.fu-berlin.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Sato-san, On Sat, Oct 14, 2023 at 4:54=E2=80=AFPM Yoshinori Sato wrote: > Renesas SuperH SH7751R common definition. > > Signed-off-by: Yoshinori Sato Thanks for your patch! > --- /dev/null > +++ b/arch/sh/boot/dts/sh7751r.dtsi > @@ -0,0 +1,148 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Device Tree Source for the SH7751R SoC > + */ > + > +#include > +#include > + > +/ { > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + > + cpus { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + cpu@0 { > + compatible =3D "renesas,sh4", "renesas,sh"; > + device_type =3D "cpu"; > + reg =3D <0>; > + clocks =3D <&cpg SH7750_CPG_ICK>; > + clock-names =3D "ick"; > + icache-size =3D <16384>; > + icache-line-size =3D <32>; > + dcache-size =3D <32768>; > + dcache-line-size =3D <32>; Wrong indentation (2 TABs and 6 spaces instead of 3 TABs). > + }; > + }; > + > + xtal: oscillator { > + #clock-cells =3D <0>; > + compatible =3D "fixed-clock"; > + clock-frequency =3D <0>; > + clock-output-names =3D "xtal"; > + }; > + > + soc { > + scif1: serial@ffe80000 { > + compatible =3D "renesas,scif-sh7751", "renesas,sc= if"; > + reg =3D <0xffe80000 0x100>; > + interrupts =3D , > + , > + , > + ; > + interrupt-names =3D "eri", "rxi", "txi", "bri"; > + clocks =3D <&cpg SH7750_CPG_SCIF_CLK>; > + clock-names =3D "fck"; > + power-domains =3D <&cpg>; status =3D "disabled"; and add &scif1 { status =3D "okay"; }; to each board .dts file that uses scif1. > + }; > + pcic: pci@fe200000 { > + compatible =3D "renesas,pci-sh7751"; > + #address-cells =3D <3>; > + #size-cells =3D <2>; > + #interrupt-cells =3D <1>; > + device_type =3D "pci"; > + bus-range =3D <0 0>; > + ranges =3D <0x02000000 0 0xfd000000 0xfd000000 0 = 0x01000000>, > + <0x01000000 0 0x00000000 0xfe240000 0 0x= 00040000>; > + reg =3D <0xfe200000 0x0400>, > + <0x0c000000 0x04000000>, > + <0xff800000 0x0030>; status =3D "disabled"; and add &pcic { status =3D "okay"; }; to each board .dts file that uses pcic. > + }; > + }; > +}; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds