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[209.85.128.176]) by smtp.gmail.com with ESMTPSA id 00721157ae682-6da2f9f144asm4035907b3.118.2024.09.03.00.23.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Sep 2024 00:23:22 -0700 (PDT) Received: by mail-yw1-f176.google.com with SMTP id 00721157ae682-699ac6dbf24so41961927b3.3; Tue, 03 Sep 2024 00:23:21 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCUjAL/M1ucqX59a2qy1Q/DZ/ZuQIKuXoy0HUGFXSCUbJLqez6cCXfnWgD8xsrN0yBZsxszeMNRRMZanlm4MX30PM0Q=@vger.kernel.org, AJvYcCWEvBe5Q9ouE+IrAGPrdndCc1q53u0tMZSWo2Yg/2mppKjNjGknwh7gTswemd96gOvzpWDm6WzkZG7E@vger.kernel.org, AJvYcCWjM0SjDBohiLhOu/bbwvEgUYLNgENbFcod5yMtmGgQ5DOGaM8WBgc1twBmnBFfMekXiabBrLu8BYqH@vger.kernel.org, AJvYcCXWY5JcjsRqBFDwQz4krGD/+1X4K3cqVosT7DfDytvSTYnAgHj/vNx2ACyUrMiDfQW1gJpP6iXORZfM@vger.kernel.org, AJvYcCXgfPz5FHVkwcUefmvP5EtMreRIUvNk6HKajZQJvDozvG9sY+esWcnEqjkQASMznmcuMGQkG6vDdTeKrG2g@vger.kernel.org X-Received: by 2002:a05:690c:b:b0:6ad:feb0:e6c9 with SMTP id 00721157ae682-6d40e4856fbmr141494947b3.23.1725348201332; Tue, 03 Sep 2024 00:23:21 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240830130218.3377060-1-claudiu.beznea.uj@bp.renesas.com> <20240830130218.3377060-2-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 3 Sep 2024 09:23:09 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 01/12] dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB To: Biju Das Cc: "Claudiu.Beznea" , "mturquette@baylibre.com" , "sboyd@kernel.org" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "alexandre.belloni@bootlin.com" , "magnus.damm@gmail.com" , "p.zabel@pengutronix.de" , "linux-renesas-soc@vger.kernel.org" , "linux-clk@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-rtc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Biju, On Tue, Sep 3, 2024 at 8:58=E2=80=AFAM Biju Das wrote: > > -----Original Message----- > > From: Claudiu > > Sent: Friday, August 30, 2024 2:02 PM > > Subject: [PATCH v3 01/12] dt-bindings: clock: renesas,r9a08g045-vbattb:= Document VBATTB > > > > From: Claudiu Beznea > > > > The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC, the= tamper detector and a small > > general usage memory of 128B. Add documentation for it. > > > > Signed-off-by: Claudiu Beznea > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.= yaml > > + power-domains: > > + maxItems: 1 > > Not sure, you need to document "PD_VBATT" power domain > as per Table 41.2, this LSI supports 3 power domains(PD_ISOVCC, PD_VCC, P= D_VBATT) > > Power Mode PD_ISOVCC PD_VCC PD_VBATT > ALL_ON ON ON ON > AWO OFF ON ON > VBATT OFF OFF ON > ALL_OFF OFF OFF OFF > > PD_VBATT domain is the area where the RTC/backup register is located, wor= ks on battery power when the power of > PD_VCC and PD_ISOVCC domain are turned off. AFAIU, PD_VBATT cannot be controlled by the user, and is just on if main or battery power is supplied. So I don't think there is a need to describe it in DT. Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds