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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Magnus Damm <magnus.damm@gmail.com>,
	Gareth Williams <gareth.williams.jx@renesas.com>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	Vinod Koul <vkoul@kernel.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	dmaengine <dmaengine@vger.kernel.org>,
	Milan Stevanovic <milan.stevanovic@se.com>,
	Jimmy Lalande <jimmy.lalande@se.com>,
	Pascal Eberhard <pascal.eberhard@se.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Herve Codina <herve.codina@bootlin.com>,
	Clement Leger <clement.leger@bootlin.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk <linux-clk@vger.kernel.org>,
	Viresh Kumar <vireshk@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Ilpo Jarvinen <ilpo.jarvinen@linux.intel.com>,
	Rob Herring <robh@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>
Subject: Re: [PATCH v10 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support
Date: Wed, 13 Apr 2022 09:53:09 +0200	[thread overview]
Message-ID: <CAMuHMdV_KWuDRWtNaL2n8+1y4GbOSSosesd3RPK60i6zYkQPDA@mail.gmail.com> (raw)
In-Reply-To: <20220412193936.63355-6-miquel.raynal@bootlin.com>

Hi Miquel,

On Tue, Apr 12, 2022 at 9:39 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional
> dmamux register located in the system control area which can take up to
> 32 requests (16 per DMA controller). Each DMA channel can be wired to
> two different peripherals.
>
> We need two additional information from the 'dmas' property: the channel
> (bit in the dmamux register) that must be accessed and the value of the
> mux for this channel.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Thanks for your patch!

> --- /dev/null
> +++ b/drivers/dma/dw/rzn1-dmamux.c
> @@ -0,0 +1,160 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2022 Schneider-Electric
> + * Author: Miquel Raynal <miquel.raynal@bootlin.com
> + * Based on TI crossbar driver written by Peter Ujfalusi <peter.ujfalusi@ti.com>
> + */
> +#include <linux/bitops.h>
> +#include <linux/of_device.h>
> +#include <linux/of_dma.h>
> +#include <linux/slab.h>
> +#include <linux/soc/renesas/r9a06g032-sysctrl.h>
> +#include <linux/types.h>
> +
> +#define RNZ1_DMAMUX_NCELLS 6
> +#define RZN1_DMAMUX_LINES 64
> +#define RZN1_DMAMUX_MAX_LINES 16
> +
> +struct rzn1_dmamux_data {
> +       struct dma_router dmarouter;
> +       unsigned long *used_chans;

Why a pointer?

> +static int rzn1_dmamux_probe(struct platform_device *pdev)
> +{
> +       struct device_node *mux_node = pdev->dev.of_node;
> +       const struct of_device_id *match;
> +       struct device_node *dmac_node;
> +       struct rzn1_dmamux_data *dmamux;
> +
> +       dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL);
> +       if (!dmamux)
> +               return -ENOMEM;
> +
> +       dmamux->used_chans = devm_bitmap_zalloc(&pdev->dev, 2 * RZN1_DMAMUX_MAX_LINES,
> +                                               GFP_KERNEL);

... Oh, you want to allocate the bitmap separately, although you
know it's just a single long.

You might as well declare it in rzn1_dmamux_data as:

    unsigned long used_chans[BITS_TO_LONGS(2 * RZN1_DMAMUX_MAX_LINES)];

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2022-04-13  7:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-12 19:39 [PATCH v10 0/9] RZN1 DMA support Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 1/9] dt-bindings: dmaengine: Introduce RZN1 dmamux bindings Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 2/9] dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnode Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 3/9] dt-bindings: dmaengine: Introduce RZN1 DMA compatible Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 4/9] soc: renesas: rzn1-sysc: Export function to set dmamux Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support Miquel Raynal
2022-04-13  7:53   ` Geert Uytterhoeven [this message]
2022-04-13  8:00     ` Miquel Raynal
2022-04-13  8:05       ` Geert Uytterhoeven
2022-04-13 10:41         ` Andy Shevchenko
2022-04-13 12:53           ` Miquel Raynal
2022-04-13 10:40     ` Andy Shevchenko
2022-04-13 13:10       ` Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 6/9] clk: renesas: r9a06g032: Probe possible children Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 7/9] dmaengine: dw: Add RZN1 compatible Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 8/9] ARM: dts: r9a06g032: Add the two DMA nodes Miquel Raynal
2022-04-12 19:39 ` [PATCH v10 9/9] ARM: dts: r9a06g032: Describe the DMA router Miquel Raynal

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