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[209.85.219.173]) by smtp.gmail.com with ESMTPSA id a9-20020ac85b89000000b002e2072c9dedsm30415864qta.67.2022.04.13.00.53.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Apr 2022 00:53:20 -0700 (PDT) Received: by mail-yb1-f173.google.com with SMTP id g34so2304630ybj.1; Wed, 13 Apr 2022 00:53:20 -0700 (PDT) X-Received: by 2002:a25:2c89:0:b0:641:2884:b52e with SMTP id s131-20020a252c89000000b006412884b52emr13177578ybs.506.1649836400443; Wed, 13 Apr 2022 00:53:20 -0700 (PDT) MIME-Version: 1.0 References: <20220412193936.63355-1-miquel.raynal@bootlin.com> <20220412193936.63355-6-miquel.raynal@bootlin.com> In-Reply-To: <20220412193936.63355-6-miquel.raynal@bootlin.com> From: Geert Uytterhoeven Date: Wed, 13 Apr 2022 09:53:09 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support To: Miquel Raynal Cc: Magnus Damm , Gareth Williams , Phil Edworthy , Vinod Koul , Linux-Renesas , dmaengine , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk , Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Miquel, On Tue, Apr 12, 2022 at 9:39 PM Miquel Raynal wrote: > The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional > dmamux register located in the system control area which can take up to > 32 requests (16 per DMA controller). Each DMA channel can be wired to > two different peripherals. > > We need two additional information from the 'dmas' property: the channel > (bit in the dmamux register) that must be accessed and the value of the > mux for this channel. > > Signed-off-by: Miquel Raynal Thanks for your patch! > --- /dev/null > +++ b/drivers/dma/dw/rzn1-dmamux.c > @@ -0,0 +1,160 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (C) 2022 Schneider-Electric > + * Author: Miquel Raynal + * Based on TI crossbar driver written by Peter Ujfalusi > + */ > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define RNZ1_DMAMUX_NCELLS 6 > +#define RZN1_DMAMUX_LINES 64 > +#define RZN1_DMAMUX_MAX_LINES 16 > + > +struct rzn1_dmamux_data { > + struct dma_router dmarouter; > + unsigned long *used_chans; Why a pointer? > +static int rzn1_dmamux_probe(struct platform_device *pdev) > +{ > + struct device_node *mux_node = pdev->dev.of_node; > + const struct of_device_id *match; > + struct device_node *dmac_node; > + struct rzn1_dmamux_data *dmamux; > + > + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); > + if (!dmamux) > + return -ENOMEM; > + > + dmamux->used_chans = devm_bitmap_zalloc(&pdev->dev, 2 * RZN1_DMAMUX_MAX_LINES, > + GFP_KERNEL); ... Oh, you want to allocate the bitmap separately, although you know it's just a single long. You might as well declare it in rzn1_dmamux_data as: unsigned long used_chans[BITS_TO_LONGS(2 * RZN1_DMAMUX_MAX_LINES)]; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds