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[209.85.128.180]) by smtp.gmail.com with ESMTPSA id 00721157ae682-66952940dcasm19267387b3.74.2024.07.23.00.22.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 Jul 2024 00:22:08 -0700 (PDT) Received: by mail-yw1-f180.google.com with SMTP id 00721157ae682-65fe1239f12so43108227b3.0; Tue, 23 Jul 2024 00:22:07 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCUIFFn2GnhLIXt6eSJELVlLO6i4UOnoNVNcOqMwMiwTXmwU9/noTL9fCicKBj0fnnQNi6cAzKNQ1XgXMeTWWEnF0UWSQQkQ0aFWDspssnh1S75KhQ2rS3ob0Sh3zERJLEYhm5St9x9rsr4I59naedhEPxuj1S06lCxjyq1WApKsWAlIrLbwyYiRNmIkFXFuqzU7QOyvm65LTqd2Hg== X-Received: by 2002:a05:690c:408f:b0:630:f6b0:6c3d with SMTP id 00721157ae682-66e4c57cc12mr19744927b3.23.1721719326975; Tue, 23 Jul 2024 00:22:06 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240627091137.370572-1-herve.codina@bootlin.com> <20240627091137.370572-3-herve.codina@bootlin.com> In-Reply-To: <20240627091137.370572-3-herve.codina@bootlin.com> From: Geert Uytterhoeven Date: Tue, 23 Jul 2024 09:21:54 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 2/7] reset: mchp: sparx5: Remove dependencies and allow building as a module To: Herve Codina , =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: Andy Shevchenko , Simon Horman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Luca Ceresoli , Thomas Petazzoni Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Herv=C3=A9 and Cl=C3=A9ment, On Thu, Jun 27, 2024 at 11:13=E2=80=AFAM Herve Codina wrote: > From: Cl=C3=A9ment L=C3=A9ger > > The sparx5 reset controller depends on the SPARX5 architecture or the > LAN966x SoC. > > This reset controller can be used by the LAN966x PCI device and so it > needs to be available on all architectures. > Also the LAN966x PCI device driver can be built as a module and this > reset controller driver has no reason to be a builtin driver in that > case. > > Signed-off-by: Cl=C3=A9ment L=C3=A9ger > Signed-off-by: Herve Codina Thanks for your patch! > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -124,8 +124,7 @@ config RESET_LPC18XX > This enables the reset controller driver for NXP LPC18xx/43xx S= oCs. > > config RESET_MCHP_SPARX5 > - bool "Microchip Sparx5 reset driver" > - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST > + tristate "Microchip Sparx5 reset driver" This opens up the question to everyone, so I'd rather add a dependency on MFD_LAN966X_PCI. > default y if SPARX5_SWITCH > select MFD_SYSCON > help Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds