* [PATCH v9 1/3] arm64: dts: renesas: r9a07g044: Add DU node
2024-02-22 13:21 [PATCH v9 0/3] Enable RZ/{G2L,G2LC} and RZ/V2L DU Biju Das
@ 2024-02-22 13:21 ` Biju Das
2024-02-22 14:15 ` Geert Uytterhoeven
2024-02-22 13:21 ` [PATCH v9 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
2024-02-22 13:21 ` [PATCH v9 3/3] arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI Biju Das
2 siblings, 1 reply; 7+ messages in thread
From: Biju Das @ 2024-02-22 13:21 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad, Biju Das
Add DU node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v8->v9:
* Added ports properties.
* Dropped Rb tag from Geert.
v7->v8:
* Added Rb tag from Geert.
v7:
* New patch.
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 27 ++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 66f68fc2b241..66b47812da9b 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -820,6 +820,33 @@ fcpvd: fcp@10880000 {
resets = <&cpg R9A07G044_LCDC_RESET_N>;
};
+ du: display@10890000 {
+ compatible = "renesas,r9a07g044-du";
+ reg = <0 0x10890000 0 0x10000>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G044_LCDC_RESET_N>;
+ renesas,vsps = <&vspd 0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g044-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v9 1/3] arm64: dts: renesas: r9a07g044: Add DU node
2024-02-22 13:21 ` [PATCH v9 1/3] arm64: dts: renesas: r9a07g044: Add DU node Biju Das
@ 2024-02-22 14:15 ` Geert Uytterhoeven
0 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2024-02-22 14:15 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
linux-renesas-soc, devicetree, Prabhakar Mahadev Lad, Biju Das
On Thu, Feb 22, 2024 at 2:21 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add DU node to RZ/G2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v8->v9:
> * Added ports properties.
> * Dropped Rb tag from Geert.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.9.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v9 2/3] arm64: dts: renesas: r9a07g054: Add DU node
2024-02-22 13:21 [PATCH v9 0/3] Enable RZ/{G2L,G2LC} and RZ/V2L DU Biju Das
2024-02-22 13:21 ` [PATCH v9 1/3] arm64: dts: renesas: r9a07g044: Add DU node Biju Das
@ 2024-02-22 13:21 ` Biju Das
2024-02-22 14:16 ` Geert Uytterhoeven
2024-02-22 13:21 ` [PATCH v9 3/3] arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI Biju Das
2 siblings, 1 reply; 7+ messages in thread
From: Biju Das @ 2024-02-22 13:21 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad, Biju Das
Add DU node to RZ/V2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v8->v9:
* Added ports properties.
* Dropped Rb tag from Geert.
v7->v8:
* Added RZ/G2L fallback
* Added Rb tag from Geert.
v7:
* New patch.
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 1f1d481dc783..74a75a42ccc3 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -826,6 +826,34 @@ fcpvd: fcp@10880000 {
resets = <&cpg R9A07G054_LCDC_RESET_N>;
};
+ du: display@10890000 {
+ compatible = "renesas,r9a07g054-du",
+ "renesas,r9a07g044-du";
+ reg = <0 0x10890000 0 0x10000>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G054_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G054_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G054_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G054_LCDC_RESET_N>;
+ renesas,vsps = <&vspd 0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g054-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v9 2/3] arm64: dts: renesas: r9a07g054: Add DU node
2024-02-22 13:21 ` [PATCH v9 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2024-02-22 14:16 ` Geert Uytterhoeven
0 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2024-02-22 14:16 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad, Biju Das
On Thu, Feb 22, 2024 at 2:21 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add DU node to RZ/V2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v8->v9:
> * Added ports properties.
> * Dropped Rb tag from Geert.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.9.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v9 3/3] arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI
2024-02-22 13:21 [PATCH v9 0/3] Enable RZ/{G2L,G2LC} and RZ/V2L DU Biju Das
2024-02-22 13:21 ` [PATCH v9 1/3] arm64: dts: renesas: r9a07g044: Add DU node Biju Das
2024-02-22 13:21 ` [PATCH v9 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2024-02-22 13:21 ` Biju Das
2024-02-22 14:32 ` Geert Uytterhoeven
2 siblings, 1 reply; 7+ messages in thread
From: Biju Das @ 2024-02-22 13:21 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad, Biju Das
Enable DU and link with DSI on RZ/{G2L,G2LC,V2L} SMARC EVK.
Move DSI port properties from board dtsi to SoC dtsi and then link with DU
and after that enable DU on the board dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v8->v9:
* Moved port properties from board dtsi to SoC dtsi
* Linked DU with DSI in SoC dtsi
* Enabled DU on the board dtsi.
v7->v8:
* No Change.
v7:
* New patch.
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 19 +++++++++++++++++++
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 19 +++++++++++++++++++
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 14 ++++----------
arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi | 14 ++++----------
4 files changed, 46 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 66b47812da9b..be6dc3f01d38 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -793,6 +793,22 @@ dsi: dsi@10850000 {
reset-names = "rst", "arst", "prst";
power-domains = <&cpg>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi0_in: endpoint {
+ remote-endpoint = <&du_out_dsi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
};
vspd: vsp@10870000 {
@@ -839,6 +855,9 @@ ports {
port@0 {
reg = <0>;
+ du_out_dsi: endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
};
port@1 {
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 74a75a42ccc3..7442ae7dff45 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -798,6 +798,22 @@ dsi: dsi@10850000 {
reset-names = "rst", "arst", "prst";
power-domains = <&cpg>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi0_in: endpoint {
+ remote-endpoint = <&du_out_dsi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
};
vspd: vsp@10870000 {
@@ -846,6 +862,9 @@ ports {
port@0 {
reg = <0>;
+ du_out_dsi: endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
};
port@1 {
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 37807f1bda4d..887dffe14910 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -40,17 +40,7 @@ &dsi {
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi0_in: endpoint {
- };
- };
-
port@1 {
- reg = <1>;
dsi0_out: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&adv7535_in>;
@@ -59,6 +49,10 @@ dsi0_out: endpoint {
};
};
+&du {
+ status = "okay";
+};
+
&i2c1 {
adv7535: hdmi@3d {
compatible = "adi,adv7535";
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index 859bc8745e66..f21508640b6e 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -56,17 +56,7 @@ &dsi {
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi0_in: endpoint {
- };
- };
-
port@1 {
- reg = <1>;
dsi0_out: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&adv7535_in>;
@@ -75,6 +65,10 @@ dsi0_out: endpoint {
};
};
+&du {
+ status = "okay";
+};
+
&i2c1 {
adv7535: hdmi@3d {
compatible = "adi,adv7535";
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v9 3/3] arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI
2024-02-22 13:21 ` [PATCH v9 3/3] arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI Biju Das
@ 2024-02-22 14:32 ` Geert Uytterhoeven
0 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2024-02-22 14:32 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad, Biju Das
Hi Biju,
On Thu, Feb 22, 2024 at 2:21 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable DU and link with DSI on RZ/{G2L,G2LC,V2L} SMARC EVK.
>
> Move DSI port properties from board dtsi to SoC dtsi and then link with DU
> and after that enable DU on the board dtsi.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v8->v9:
> * Moved port properties from board dtsi to SoC dtsi
> * Linked DU with DSI in SoC dtsi
> * Enabled DU on the board dtsi.
LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue this in renesas-devel for v6.9 tomorrow, unless
anyone objects.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread