* [PATCH 0/4] Add USB3.0 clocks and resets for R9A09G057 and R9A09G056
@ 2025-11-01 5:00 Prabhakar
2025-11-01 5:00 ` [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks Prabhakar
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Prabhakar @ 2025-11-01 5:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc
Cc: linux-clk, linux-kernel, devicetree, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi All,
This patch series adds USB3.0 clock and reset entries for Renesas R9A09G057
and R9A09G056 SoCs. The changes include updates to the clock driver source
files and the corresponding device tree bindings header files.
Cheers,
Prabhakar
Lad Prabhakar (4):
dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
clk: renesas: r9a09g057: Add USB3.0 clocks/resets
clk: renesas: r9a09g056: Add USB3.0 clocks/resets
drivers/clk/renesas/r9a09g056-cpg.c | 9 ++++++++-
drivers/clk/renesas/r9a09g057-cpg.c | 16 +++++++++++++++-
.../dt-bindings/clock/renesas,r9a09g056-cpg.h | 2 ++
.../dt-bindings/clock/renesas,r9a09g057-cpg.h | 4 ++++
4 files changed, 29 insertions(+), 2 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
2025-11-01 5:00 [PATCH 0/4] Add USB3.0 clocks and resets for R9A09G057 and R9A09G056 Prabhakar
@ 2025-11-01 5:00 ` Prabhakar
2025-11-02 16:40 ` Krzysztof Kozlowski
2025-11-13 16:53 ` Geert Uytterhoeven
2025-11-01 5:00 ` [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: " Prabhakar
` (2 subsequent siblings)
3 siblings, 2 replies; 11+ messages in thread
From: Prabhakar @ 2025-11-01 5:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc
Cc: linux-clk, linux-kernel, devicetree, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add definitions for USB3.0 core clocks in the R9A09G057 CPG DT bindings
header file.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
include/dt-bindings/clock/renesas,r9a09g057-cpg.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/renesas,r9a09g057-cpg.h b/include/dt-bindings/clock/renesas,r9a09g057-cpg.h
index 5346a898ab60..f91d7f72922a 100644
--- a/include/dt-bindings/clock/renesas,r9a09g057-cpg.h
+++ b/include/dt-bindings/clock/renesas,r9a09g057-cpg.h
@@ -22,5 +22,9 @@
#define R9A09G057_GBETH_0_CLK_PTP_REF_I 11
#define R9A09G057_GBETH_1_CLK_PTP_REF_I 12
#define R9A09G057_SPI_CLK_SPI 13
+#define R9A09G057_USB3_0_REF_ALT_CLK_P 14
+#define R9A09G057_USB3_0_CLKCORE 15
+#define R9A09G057_USB3_1_REF_ALT_CLK_P 16
+#define R9A09G057_USB3_1_CLKCORE 17
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
2025-11-01 5:00 [PATCH 0/4] Add USB3.0 clocks and resets for R9A09G057 and R9A09G056 Prabhakar
2025-11-01 5:00 ` [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks Prabhakar
@ 2025-11-01 5:00 ` Prabhakar
2025-11-02 16:40 ` Krzysztof Kozlowski
2025-11-13 16:53 ` Geert Uytterhoeven
2025-11-01 5:00 ` [PATCH 3/4] clk: renesas: r9a09g057: Add USB3.0 clocks/resets Prabhakar
2025-11-01 5:00 ` [PATCH 4/4] clk: renesas: r9a09g056: " Prabhakar
3 siblings, 2 replies; 11+ messages in thread
From: Prabhakar @ 2025-11-01 5:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc
Cc: linux-clk, linux-kernel, devicetree, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add definitions for USB3.0 core clocks in the R9A09G056 CPG DT bindings
header file.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
include/dt-bindings/clock/renesas,r9a09g056-cpg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/renesas,r9a09g056-cpg.h b/include/dt-bindings/clock/renesas,r9a09g056-cpg.h
index a9af5af9e3a1..234dcf4f0f91 100644
--- a/include/dt-bindings/clock/renesas,r9a09g056-cpg.h
+++ b/include/dt-bindings/clock/renesas,r9a09g056-cpg.h
@@ -21,5 +21,7 @@
#define R9A09G056_GBETH_0_CLK_PTP_REF_I 10
#define R9A09G056_GBETH_1_CLK_PTP_REF_I 11
#define R9A09G056_SPI_CLK_SPI 12
+#define R9A09G056_USB3_0_REF_ALT_CLK_P 13
+#define R9A09G056_USB3_0_CLKCORE 14
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G056_CPG_H__ */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/4] clk: renesas: r9a09g057: Add USB3.0 clocks/resets
2025-11-01 5:00 [PATCH 0/4] Add USB3.0 clocks and resets for R9A09G057 and R9A09G056 Prabhakar
2025-11-01 5:00 ` [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks Prabhakar
2025-11-01 5:00 ` [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: " Prabhakar
@ 2025-11-01 5:00 ` Prabhakar
2025-11-13 16:54 ` Geert Uytterhoeven
2025-11-01 5:00 ` [PATCH 4/4] clk: renesas: r9a09g056: " Prabhakar
3 siblings, 1 reply; 11+ messages in thread
From: Prabhakar @ 2025-11-01 5:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc
Cc: linux-clk, linux-kernel, devicetree, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add USB3.0 clock and reset entries.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/clk/renesas/r9a09g057-cpg.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
index c9f6d91884c3..400d9e94f2e9 100644
--- a/drivers/clk/renesas/r9a09g057-cpg.c
+++ b/drivers/clk/renesas/r9a09g057-cpg.c
@@ -17,7 +17,7 @@
enum clk_ids {
/* Core Clock Outputs exported to DT */
- LAST_DT_CORE_CLK = R9A09G057_SPI_CLK_SPI,
+ LAST_DT_CORE_CLK = R9A09G057_USB3_1_CLKCORE,
/* External Input Clocks */
CLK_AUDIO_EXTAL,
@@ -235,6 +235,10 @@ static const struct cpg_core_clk r9a09g057_core_clks[] __initconst = {
CLK_PLLETH_DIV_125_FIX, 1, 1),
DEF_FIXED_MOD_STATUS("spi_clk_spi", R9A09G057_SPI_CLK_SPI, CLK_PLLCM33_XSPI, 1, 2,
FIXED_MOD_CONF_XSPI),
+ DEF_FIXED("usb3_0_ref_alt_clk_p", R9A09G057_USB3_0_REF_ALT_CLK_P, CLK_QEXTAL, 1, 1),
+ DEF_FIXED("usb3_0_core_clk", R9A09G057_USB3_0_CLKCORE, CLK_QEXTAL, 1, 1),
+ DEF_FIXED("usb3_1_ref_alt_clk_p", R9A09G057_USB3_1_REF_ALT_CLK_P, CLK_QEXTAL, 1, 1),
+ DEF_FIXED("usb3_1_core_clk", R9A09G057_USB3_1_CLKCORE, CLK_QEXTAL, 1, 1),
};
static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {
@@ -360,6 +364,14 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {
BUS_MSTOP(8, BIT(4))),
DEF_MOD("sdhi_2_aclk", CLK_PLLDTY_ACPU_DIV4, 10, 14, 5, 14,
BUS_MSTOP(8, BIT(4))),
+ DEF_MOD("usb3_0_aclk", CLK_PLLDTY_DIV8, 10, 15, 5, 15,
+ BUS_MSTOP(7, BIT(12))),
+ DEF_MOD("usb3_0_pclk_usbtst", CLK_PLLDTY_ACPU_DIV4, 11, 0, 5, 16,
+ BUS_MSTOP(7, BIT(14))),
+ DEF_MOD("usb3_1_aclk", CLK_PLLDTY_DIV8, 11, 1, 5, 17,
+ BUS_MSTOP(7, BIT(13))),
+ DEF_MOD("usb3_1_pclk_usbtst", CLK_PLLDTY_ACPU_DIV4, 11, 2, 5, 18,
+ BUS_MSTOP(7, BIT(15))),
DEF_MOD("usb2_0_u2h0_hclk", CLK_PLLDTY_DIV8, 11, 3, 5, 19,
BUS_MSTOP(7, BIT(7))),
DEF_MOD("usb2_0_u2h1_hclk", CLK_PLLDTY_DIV8, 11, 4, 5, 20,
@@ -501,6 +513,8 @@ static const struct rzv2h_reset r9a09g057_resets[] __initconst = {
DEF_RST(10, 7, 4, 24), /* SDHI_0_IXRST */
DEF_RST(10, 8, 4, 25), /* SDHI_1_IXRST */
DEF_RST(10, 9, 4, 26), /* SDHI_2_IXRST */
+ DEF_RST(10, 10, 4, 27), /* USB3_0_ARESETN */
+ DEF_RST(10, 11, 4, 28), /* USB3_1_ARESETN */
DEF_RST(10, 12, 4, 29), /* USB2_0_U2H0_HRESETN */
DEF_RST(10, 13, 4, 30), /* USB2_0_U2H1_HRESETN */
DEF_RST(10, 14, 4, 31), /* USB2_0_U2P_EXL_SYSRST */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/4] clk: renesas: r9a09g056: Add USB3.0 clocks/resets
2025-11-01 5:00 [PATCH 0/4] Add USB3.0 clocks and resets for R9A09G057 and R9A09G056 Prabhakar
` (2 preceding siblings ...)
2025-11-01 5:00 ` [PATCH 3/4] clk: renesas: r9a09g057: Add USB3.0 clocks/resets Prabhakar
@ 2025-11-01 5:00 ` Prabhakar
2025-11-13 16:54 ` Geert Uytterhoeven
3 siblings, 1 reply; 11+ messages in thread
From: Prabhakar @ 2025-11-01 5:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc
Cc: linux-clk, linux-kernel, devicetree, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add USB3.0 clock and reset entries.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/clk/renesas/r9a09g056-cpg.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/r9a09g056-cpg.c b/drivers/clk/renesas/r9a09g056-cpg.c
index e4a6dfd2bec9..f48a082e65d7 100644
--- a/drivers/clk/renesas/r9a09g056-cpg.c
+++ b/drivers/clk/renesas/r9a09g056-cpg.c
@@ -17,7 +17,7 @@
enum clk_ids {
/* Core Clock Outputs exported to DT */
- LAST_DT_CORE_CLK = R9A09G056_SPI_CLK_SPI,
+ LAST_DT_CORE_CLK = R9A09G056_USB3_0_CLKCORE,
/* External Input Clocks */
CLK_AUDIO_EXTAL,
@@ -226,6 +226,8 @@ static const struct cpg_core_clk r9a09g056_core_clks[] __initconst = {
CLK_PLLETH_DIV_125_FIX, 1, 1),
DEF_FIXED_MOD_STATUS("spi_clk_spi", R9A09G056_SPI_CLK_SPI, CLK_PLLCM33_XSPI, 1, 2,
FIXED_MOD_CONF_XSPI),
+ DEF_FIXED("usb3_0_ref_alt_clk_p", R9A09G056_USB3_0_REF_ALT_CLK_P, CLK_QEXTAL, 1, 1),
+ DEF_FIXED("usb3_0_core_clk", R9A09G056_USB3_0_CLKCORE, CLK_QEXTAL, 1, 1),
};
static const struct rzv2h_mod_clk r9a09g056_mod_clks[] __initconst = {
@@ -319,6 +321,10 @@ static const struct rzv2h_mod_clk r9a09g056_mod_clks[] __initconst = {
BUS_MSTOP(8, BIT(4))),
DEF_MOD("sdhi_2_aclk", CLK_PLLDTY_ACPU_DIV4, 10, 14, 5, 14,
BUS_MSTOP(8, BIT(4))),
+ DEF_MOD("usb3_0_aclk", CLK_PLLDTY_DIV8, 10, 15, 5, 15,
+ BUS_MSTOP(7, BIT(12))),
+ DEF_MOD("usb3_0_pclk_usbtst", CLK_PLLDTY_ACPU_DIV4, 11, 0, 5, 16,
+ BUS_MSTOP(7, BIT(14))),
DEF_MOD("usb2_0_u2h0_hclk", CLK_PLLDTY_DIV8, 11, 3, 5, 19,
BUS_MSTOP(7, BIT(7))),
DEF_MOD("usb2_0_u2p_exr_cpuclk", CLK_PLLDTY_ACPU_DIV4, 11, 5, 5, 21,
@@ -426,6 +432,7 @@ static const struct rzv2h_reset r9a09g056_resets[] __initconst = {
DEF_RST(10, 7, 4, 24), /* SDHI_0_IXRST */
DEF_RST(10, 8, 4, 25), /* SDHI_1_IXRST */
DEF_RST(10, 9, 4, 26), /* SDHI_2_IXRST */
+ DEF_RST(10, 10, 4, 27), /* USB3_0_ARESETN */
DEF_RST(10, 12, 4, 29), /* USB2_0_U2H0_HRESETN */
DEF_RST(10, 14, 4, 31), /* USB2_0_U2P_EXL_SYSRST */
DEF_RST(10, 15, 5, 0), /* USB2_0_PRESETN */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
2025-11-01 5:00 ` [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks Prabhakar
@ 2025-11-02 16:40 ` Krzysztof Kozlowski
2025-11-13 16:53 ` Geert Uytterhoeven
1 sibling, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2025-11-02 16:40 UTC (permalink / raw)
To: Prabhakar
Cc: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc,
linux-clk, linux-kernel, devicetree, Biju Das, Fabrizio Castro,
Lad Prabhakar
On Sat, Nov 01, 2025 at 05:00:31AM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add definitions for USB3.0 core clocks in the R9A09G057 CPG DT bindings
> header file.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> include/dt-bindings/clock/renesas,r9a09g057-cpg.h | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
2025-11-01 5:00 ` [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: " Prabhakar
@ 2025-11-02 16:40 ` Krzysztof Kozlowski
2025-11-13 16:53 ` Geert Uytterhoeven
1 sibling, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2025-11-02 16:40 UTC (permalink / raw)
To: Prabhakar
Cc: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc,
linux-clk, linux-kernel, devicetree, Biju Das, Fabrizio Castro,
Lad Prabhakar
On Sat, Nov 01, 2025 at 05:00:32AM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add definitions for USB3.0 core clocks in the R9A09G056 CPG DT bindings
> header file.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> include/dt-bindings/clock/renesas,r9a09g056-cpg.h | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
2025-11-01 5:00 ` [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks Prabhakar
2025-11-02 16:40 ` Krzysztof Kozlowski
@ 2025-11-13 16:53 ` Geert Uytterhoeven
1 sibling, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2025-11-13 16:53 UTC (permalink / raw)
To: Prabhakar
Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Magnus Damm, linux-renesas-soc, linux-clk,
linux-kernel, devicetree, Biju Das, Fabrizio Castro,
Lad Prabhakar
On Sat, 1 Nov 2025 at 06:00, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add definitions for USB3.0 core clocks in the R9A09G057 CPG DT bindings
> header file.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in a branch shared by clock driver and DTS source files.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
2025-11-01 5:00 ` [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: " Prabhakar
2025-11-02 16:40 ` Krzysztof Kozlowski
@ 2025-11-13 16:53 ` Geert Uytterhoeven
1 sibling, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2025-11-13 16:53 UTC (permalink / raw)
To: Prabhakar
Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Magnus Damm, linux-renesas-soc, linux-clk,
linux-kernel, devicetree, Biju Das, Fabrizio Castro,
Lad Prabhakar
On Sat, 1 Nov 2025 at 06:00, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add definitions for USB3.0 core clocks in the R9A09G056 CPG DT bindings
> header file.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in a branch shared by clock driver and DTS source files.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/4] clk: renesas: r9a09g057: Add USB3.0 clocks/resets
2025-11-01 5:00 ` [PATCH 3/4] clk: renesas: r9a09g057: Add USB3.0 clocks/resets Prabhakar
@ 2025-11-13 16:54 ` Geert Uytterhoeven
0 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2025-11-13 16:54 UTC (permalink / raw)
To: Prabhakar
Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Magnus Damm, linux-renesas-soc, linux-clk,
linux-kernel, devicetree, Biju Das, Fabrizio Castro,
Lad Prabhakar
On Sat, 1 Nov 2025 at 06:01, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add USB3.0 clock and reset entries.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk for v6.19.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] clk: renesas: r9a09g056: Add USB3.0 clocks/resets
2025-11-01 5:00 ` [PATCH 4/4] clk: renesas: r9a09g056: " Prabhakar
@ 2025-11-13 16:54 ` Geert Uytterhoeven
0 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2025-11-13 16:54 UTC (permalink / raw)
To: Prabhakar
Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Magnus Damm, linux-renesas-soc, linux-clk,
linux-kernel, devicetree, Biju Das, Fabrizio Castro,
Lad Prabhakar
On Sat, 1 Nov 2025 at 06:01, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add USB3.0 clock and reset entries.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk for v6.19.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-11-13 16:54 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-01 5:00 [PATCH 0/4] Add USB3.0 clocks and resets for R9A09G057 and R9A09G056 Prabhakar
2025-11-01 5:00 ` [PATCH 1/4] dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks Prabhakar
2025-11-02 16:40 ` Krzysztof Kozlowski
2025-11-13 16:53 ` Geert Uytterhoeven
2025-11-01 5:00 ` [PATCH 2/4] dt-bindings: clock: renesas,r9a09g056-cpg: " Prabhakar
2025-11-02 16:40 ` Krzysztof Kozlowski
2025-11-13 16:53 ` Geert Uytterhoeven
2025-11-01 5:00 ` [PATCH 3/4] clk: renesas: r9a09g057: Add USB3.0 clocks/resets Prabhakar
2025-11-13 16:54 ` Geert Uytterhoeven
2025-11-01 5:00 ` [PATCH 4/4] clk: renesas: r9a09g056: " Prabhakar
2025-11-13 16:54 ` Geert Uytterhoeven
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).