* [PATCH v2 1/6] arm64: dts: renesas: r8a77951: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
@ 2020-12-10 15:27 ` Niklas Söderlund
2020-12-11 12:39 ` Geert Uytterhoeven
2020-12-10 15:27 ` [PATCH v2 2/6] arm64: dts: renesas: r8a77960: " Niklas Söderlund
` (5 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-10 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, devicetree
Cc: linux-renesas-soc, Niklas Söderlund
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car H3
(r8a77951) SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
* Changes since v1
- Use correct interrupts no for tmu4.
---
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 9d60bcf69e4f52ce..5c39152e45707441 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -616,6 +616,71 @@ intc_ex: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 2/6] arm64: dts: renesas: r8a77960: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
2020-12-10 15:27 ` [PATCH v2 1/6] arm64: dts: renesas: r8a77951: " Niklas Söderlund
@ 2020-12-10 15:27 ` Niklas Söderlund
2020-12-11 12:39 ` Geert Uytterhoeven
2020-12-10 15:27 ` [PATCH v2 3/6] arm64: dts: renesas: r8a77961: " Niklas Söderlund
` (4 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-10 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, devicetree
Cc: linux-renesas-soc, Niklas Söderlund
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car M3-W
(r8a77960) SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
* Changes since v1
- Use correct interrupts no for tmu4.
---
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index 53b9aa26c9b13fa7..25d947a81b294a81 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -585,6 +585,71 @@ intc_ex: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 3/6] arm64: dts: renesas: r8a77961: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
2020-12-10 15:27 ` [PATCH v2 1/6] arm64: dts: renesas: r8a77951: " Niklas Söderlund
2020-12-10 15:27 ` [PATCH v2 2/6] arm64: dts: renesas: r8a77960: " Niklas Söderlund
@ 2020-12-10 15:27 ` Niklas Söderlund
2020-12-11 12:40 ` Geert Uytterhoeven
2020-12-10 15:27 ` [PATCH v2 4/6] arm64: dts: renesas: r8a77965: " Niklas Söderlund
` (3 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-10 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, devicetree
Cc: linux-renesas-soc, Niklas Söderlund
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car M3-W+
(r8a77961) SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
* Changes since v1
- Use correct interrupts no for tmu4.
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 4b5b242d5b251147..e8c31ebec09730c4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -565,6 +565,71 @@ intc_ex: interrupt-controller@e61c0000 {
/* placeholder */
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a77961", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a77961", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a77961", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a77961", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a77961", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 4/6] arm64: dts: renesas: r8a77965: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
` (2 preceding siblings ...)
2020-12-10 15:27 ` [PATCH v2 3/6] arm64: dts: renesas: r8a77961: " Niklas Söderlund
@ 2020-12-10 15:27 ` Niklas Söderlund
2020-12-11 12:41 ` Geert Uytterhoeven
2020-12-10 15:27 ` [PATCH v2 5/6] arm64: dts: renesas: r8a77990: " Niklas Söderlund
` (2 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-10 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, devicetree
Cc: linux-renesas-soc, Niklas Söderlund
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car M3-N
(r8a77965) SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
* Changes since v1
- Use correct interrupts no for tmu4.
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 4a913df17b1dc219..657b20d3533bd398 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -455,6 +455,71 @@ intc_ex: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 5/6] arm64: dts: renesas: r8a77990: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
` (3 preceding siblings ...)
2020-12-10 15:27 ` [PATCH v2 4/6] arm64: dts: renesas: r8a77965: " Niklas Söderlund
@ 2020-12-10 15:27 ` Niklas Söderlund
2020-12-11 12:41 ` Geert Uytterhoeven
2020-12-10 15:27 ` [PATCH v2 6/6] arm64: dts: renesas: r8a77995: " Niklas Söderlund
2020-12-11 12:43 ` [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: " Geert Uytterhoeven
6 siblings, 1 reply; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-10 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, devicetree
Cc: linux-renesas-soc, Niklas Söderlund
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car E3
(r8a77990) SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
* Changes since v1
- Use correct interrupts no for tmu4.
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 87d41bc076a99d95..5010f23fafcc7f98 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -420,6 +420,71 @@ intc_ex: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 6/6] arm64: dts: renesas: r8a77995: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
` (4 preceding siblings ...)
2020-12-10 15:27 ` [PATCH v2 5/6] arm64: dts: renesas: r8a77990: " Niklas Söderlund
@ 2020-12-10 15:27 ` Niklas Söderlund
2020-12-11 12:42 ` Geert Uytterhoeven
2020-12-11 12:43 ` [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: " Geert Uytterhoeven
6 siblings, 1 reply; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-10 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, devicetree
Cc: linux-renesas-soc, Niklas Söderlund
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car D3
(r8a77995) SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
* Changes since v1
- Use correct interrupts no for tmu4.
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index aca0b2d015cfc769..2319271c881b69ce 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -312,6 +312,71 @@ intc_ex: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes
2020-12-10 15:26 [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes Niklas Söderlund
` (5 preceding siblings ...)
2020-12-10 15:27 ` [PATCH v2 6/6] arm64: dts: renesas: r8a77995: " Niklas Söderlund
@ 2020-12-11 12:43 ` Geert Uytterhoeven
2020-12-15 8:55 ` Niklas Söderlund
6 siblings, 1 reply; 15+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:43 UTC (permalink / raw)
To: Niklas Söderlund
Cc: Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux-Renesas
Hi Niklas,
On Thu, Dec 10, 2020 at 4:27 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> Add TMU nodes to Renesas R-Car H3, M3-W, M3-W+, D3, M3-N and E3. I have
> tested this on all but D3 and E3 SoCs which I do not have access to. I
> tested by enabling all TMU nodes in DT and then used the kernel timer
> selftests located in tools/testing/selftests/timers/
>
> - clocksource-switch.c
> - inconsistency-check.c
> - nanosleep.c
>
> The test passes for all SoCs I have access to and I no reason to believe
> it would not also work on D3 and E3.
>
> Niklas Söderlund (6):
> arm64: dts: renesas: r8a77951: Add TMU nodes
> arm64: dts: renesas: r8a77960: Add TMU nodes
> arm64: dts: renesas: r8a77961: Add TMU nodes
> arm64: dts: renesas: r8a77965: Add TMU nodes
> arm64: dts: renesas: r8a77990: Add TMU nodes
> arm64: dts: renesas: r8a77995: Add TMU nodes
>
> arch/arm64/boot/dts/renesas/r8a77951.dtsi | 65 +++++++++++++++++++++++
> arch/arm64/boot/dts/renesas/r8a77960.dtsi | 65 +++++++++++++++++++++++
> arch/arm64/boot/dts/renesas/r8a77961.dtsi | 65 +++++++++++++++++++++++
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 65 +++++++++++++++++++++++
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 65 +++++++++++++++++++++++
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 65 +++++++++++++++++++++++
> 6 files changed, 390 insertions(+)
Would you mind if I would squash these into a single commit while applying?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: Add TMU nodes
2020-12-11 12:43 ` [PATCH v2 0/6] [PATCH 0/6] arm64: dts: renesas: " Geert Uytterhoeven
@ 2020-12-15 8:55 ` Niklas Söderlund
0 siblings, 0 replies; 15+ messages in thread
From: Niklas Söderlund @ 2020-12-15 8:55 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux-Renesas
Hi Geert,
On 2020-12-11 13:43:34 +0100, Geert Uytterhoeven wrote:
> Hi Niklas,
>
> On Thu, Dec 10, 2020 at 4:27 PM Niklas Söderlund
> <niklas.soderlund+renesas@ragnatech.se> wrote:
> > Add TMU nodes to Renesas R-Car H3, M3-W, M3-W+, D3, M3-N and E3. I have
> > tested this on all but D3 and E3 SoCs which I do not have access to. I
> > tested by enabling all TMU nodes in DT and then used the kernel timer
> > selftests located in tools/testing/selftests/timers/
> >
> > - clocksource-switch.c
> > - inconsistency-check.c
> > - nanosleep.c
> >
> > The test passes for all SoCs I have access to and I no reason to believe
> > it would not also work on D3 and E3.
> >
> > Niklas Söderlund (6):
> > arm64: dts: renesas: r8a77951: Add TMU nodes
> > arm64: dts: renesas: r8a77960: Add TMU nodes
> > arm64: dts: renesas: r8a77961: Add TMU nodes
> > arm64: dts: renesas: r8a77965: Add TMU nodes
> > arm64: dts: renesas: r8a77990: Add TMU nodes
> > arm64: dts: renesas: r8a77995: Add TMU nodes
> >
> > arch/arm64/boot/dts/renesas/r8a77951.dtsi | 65 +++++++++++++++++++++++
> > arch/arm64/boot/dts/renesas/r8a77960.dtsi | 65 +++++++++++++++++++++++
> > arch/arm64/boot/dts/renesas/r8a77961.dtsi | 65 +++++++++++++++++++++++
> > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 65 +++++++++++++++++++++++
> > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 65 +++++++++++++++++++++++
> > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 65 +++++++++++++++++++++++
> > 6 files changed, 390 insertions(+)
>
> Would you mind if I would squash these into a single commit while applying?
> Thanks!
Not at all, please squash them if you think it makes more sens.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
--
Regards,
Niklas Söderlund
^ permalink raw reply [flat|nested] 15+ messages in thread