From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: linux-renesas-soc@vger.kernel.org,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [RFC PATCH 2/4] ARM: dts: renesas: r9a06g032: add second clock input to RTC
Date: Thu, 10 Apr 2025 17:32:26 +0200 [thread overview]
Message-ID: <CAMuHMdWO7M+SyvD6gj5h2yFFzpwyXhHzrxWgSCTz8hJb+puzBg@mail.gmail.com> (raw)
In-Reply-To: <20250313102546.27335-3-wsa+renesas@sang-engineering.com>
Hi Wolfram,
On Thu, 13 Mar 2025 at 11:25, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> The external rtc clock is populated on the RZ/N1D module, so describe it
> and add a reference to the RTC node.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Thanks for your patch!
> For the non-RFC series, it makes probably sense to split this patch into
> two.
Indeed.
> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> @@ -47,6 +47,10 @@ ð_miic {
> renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
> };
>
> +&ext_rtc_clk {
> + clock-frequency = <32768>;
> +};
That's the mighty 0.033 MHz crystal X2_1? ;-)
This change is good for sure.
> +
> &gmac2 {
> status = "okay";
> phy-mode = "gmii";
> diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> index 7548291c8d7e..458dab9d3b7f 100644
> --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> @@ -73,8 +73,8 @@ rtc0: rtc@40006000 {
> <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,
> <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
> interrupt-names = "alarm", "timer", "pps";
> - clocks = <&sysctrl R9A06G032_HCLK_RTC>;
> - clock-names = "hclk";
> + clocks = <&sysctrl R9A06G032_HCLK_RTC>, <&ext_rtc_clk>;
> + clock-names = "hclk", "xtal";
This depends on whether we decide to provide direct access to ext_rtc_clk,
or through the system controller's clock provider.
> power-domains = <&sysctrl>;
> status = "disabled";
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
prev parent reply other threads:[~2025-04-10 15:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-13 10:25 [RFC PATCH 0/4] rtc: rzn1: support XTAL clk and SCMP method Wolfram Sang
2025-03-13 10:25 ` [RFC PATCH 1/4] dt-bindings: rtc: rzn1: add optional second clock Wolfram Sang
2025-03-14 8:41 ` Krzysztof Kozlowski
2025-03-14 8:54 ` Wolfram Sang
2025-03-13 10:25 ` [RFC PATCH 2/4] ARM: dts: renesas: r9a06g032: add second clock input to RTC Wolfram Sang
2025-04-10 15:32 ` Geert Uytterhoeven [this message]
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