* [PATCH 1/5] ARM: dts: r8a7745: Add internal PCI bridge nodes
2017-10-09 13:58 [PATCH 0/5] Add USB2.0 Host support Biju Das
@ 2017-10-09 13:58 ` Biju Das
[not found] ` <1507557541-46560-2-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
2017-10-09 13:58 ` [PATCH 3/5] ARM: dts: r8a7745: Link PCI USB devices to USB PHY Biju Das
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2017-10-09 13:58 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Yoshihiro Shimoda, Magnus Damm, Chris Paterson,
Fabrizio Castro, devicetree, linux-renesas-soc, Biju Das
Add device nodes for the r8a7745 internal PCI bridge devices.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
---
arch/arm/boot/dts/r8a7745.dtsi | 46 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6ba3b8b..b4e9536 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -845,6 +845,52 @@
resets = <&cpg 311>;
status = "disabled";
};
+
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7745",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pci1: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7745",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
/* External root clock */
--
1.9.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 3/5] ARM: dts: r8a7745: Link PCI USB devices to USB PHY
2017-10-09 13:58 [PATCH 0/5] Add USB2.0 Host support Biju Das
2017-10-09 13:58 ` [PATCH 1/5] ARM: dts: r8a7745: Add internal PCI bridge nodes Biju Das
@ 2017-10-09 13:58 ` Biju Das
[not found] ` <1507557541-46560-4-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
[not found] ` <1507557541-46560-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
2017-10-09 13:59 ` [PATCH 5/5] ARM: dts: iwg22d-sodimm: Enable USB PHY Biju Das
3 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2017-10-09 13:58 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Yoshihiro Shimoda, Magnus Damm, Chris Paterson,
Fabrizio Castro, devicetree, linux-renesas-soc, Biju Das
Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
---
arch/arm/boot/dts/r8a7745.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 17cfa53..3a50f70 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -867,6 +867,18 @@
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
};
pci1: pci@ee0d0000 {
@@ -890,6 +902,18 @@
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
};
usbphy: usb-phy@e6590100 {
--
1.9.1
^ permalink raw reply related [flat|nested] 12+ messages in thread[parent not found: <1507557541-46560-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>]
* [PATCH 2/5] ARM: dts: r8a7745: Add USB PHY DT support
[not found] ` <1507557541-46560-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
@ 2017-10-09 13:58 ` Biju Das
2017-10-11 13:05 ` Geert Uytterhoeven
2017-10-09 13:59 ` [PATCH 4/5] ARM: dts: iwg22d-sodimm: Enable internal PCI Biju Das
2017-10-12 10:15 ` [PATCH 0/5] Add USB2.0 Host support Simon Horman
2 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2017-10-09 13:58 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Yoshihiro Shimoda, Magnus Damm, Chris Paterson,
Fabrizio Castro, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA, Biju Das
Define the r8a7745 generic part of the USB PHY device node.
Signed-off-by: Biju Das <biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
Signed-off-by: Chris Paterson <chris.paterson2-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/boot/dts/r8a7745.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index b4e9536..17cfa53 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -891,6 +891,28 @@
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7745",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
+
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+ };
};
/* External root clock */
--
1.9.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/5] ARM: dts: r8a7745: Add USB PHY DT support
2017-10-09 13:58 ` [PATCH 2/5] ARM: dts: r8a7745: Add USB PHY DT support Biju Das
@ 2017-10-11 13:05 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2017-10-11 13:05 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Simon Horman, Yoshihiro Shimoda,
Magnus Damm, Chris Paterson, Fabrizio Castro,
devicetree@vger.kernel.org, Linux-Renesas
On Mon, Oct 9, 2017 at 3:58 PM, Biju Das <biju.das@bp.renesas.com> wrote:
> Define the r8a7745 generic part of the USB PHY device node.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/5] ARM: dts: iwg22d-sodimm: Enable internal PCI
[not found] ` <1507557541-46560-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
2017-10-09 13:58 ` [PATCH 2/5] ARM: dts: r8a7745: Add USB PHY DT support Biju Das
@ 2017-10-09 13:59 ` Biju Das
[not found] ` <1507557541-46560-5-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
2017-10-12 10:15 ` [PATCH 0/5] Add USB2.0 Host support Simon Horman
2 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2017-10-09 13:59 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Yoshihiro Shimoda, Magnus Damm, Chris Paterson,
Fabrizio Castro, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA, Biju Das
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.
Signed-off-by: Biju Das <biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
Signed-off-by: Chris Paterson <chris.paterson2-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 8772c56..e378e5e 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -55,6 +55,11 @@
function = "sdhi0";
power-source = <3300>;
};
+
+ usb1_pins: usb1 {
+ groups = "usb1";
+ function = "usb1";
+ };
};
&scif4 {
@@ -92,3 +97,9 @@
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&pci1 {
+ status = "okay";
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+};
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 0/5] Add USB2.0 Host support
[not found] ` <1507557541-46560-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
2017-10-09 13:58 ` [PATCH 2/5] ARM: dts: r8a7745: Add USB PHY DT support Biju Das
2017-10-09 13:59 ` [PATCH 4/5] ARM: dts: iwg22d-sodimm: Enable internal PCI Biju Das
@ 2017-10-12 10:15 ` Simon Horman
2 siblings, 0 replies; 12+ messages in thread
From: Simon Horman @ 2017-10-12 10:15 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Yoshihiro Shimoda, Magnus Damm,
Chris Paterson, Fabrizio Castro,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA
On Mon, Oct 09, 2017 at 02:58:56PM +0100, Biju Das wrote:
> Hello,
>
> This series aims to add USB2.0 Host support on iWave RZ/G1E(r8a7745) based board.
>
> This series has been tested against renesas-dev tag 20171009-v4.14-rc4
>
> This patch has documentation dependency on below patch
> * [RESEND] phy: rcar-gen2: Add r8a7743/5 support
> https://patchwork.kernel.org/patch/9992587/
>
> Biju Das (5):
> ARM: dts: r8a7745: Add internal PCI bridge nodes
> ARM: dts: r8a7745: Add USB PHY DT support
> ARM: dts: r8a7745: Link PCI USB devices to USB PHY
> ARM: dts: iwg22d-sodimm: Enable internal PCI
> ARM: dts: iwg22d-sodimm: Enable USB PHY
Thanks, applied with Geert's review tags.
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/5] ARM: dts: iwg22d-sodimm: Enable USB PHY
2017-10-09 13:58 [PATCH 0/5] Add USB2.0 Host support Biju Das
` (2 preceding siblings ...)
[not found] ` <1507557541-46560-1-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
@ 2017-10-09 13:59 ` Biju Das
[not found] ` <1507557541-46560-6-git-send-email-biju.das-kTT6dE0pTRh9uiUsa/gSgQ@public.gmane.org>
3 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2017-10-09 13:59 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Yoshihiro Shimoda, Magnus Damm, Chris Paterson,
Fabrizio Castro, devicetree, linux-renesas-soc, Biju Das
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index e378e5e..52153ec 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -103,3 +103,7 @@
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
};
+
+&usbphy {
+ status = "okay";
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 12+ messages in thread