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[209.85.217.44]) by smtp.gmail.com with ESMTPSA id 71dfb90a1353d-527abd77f82sm2692998e0c.17.2025.04.15.07.58.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Apr 2025 07:58:25 -0700 (PDT) Received: by mail-vs1-f44.google.com with SMTP id ada2fe7eead31-4c30a4bcceeso257796137.3; Tue, 15 Apr 2025 07:58:25 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCU1EoIjQvNAv9hxy7XPegaT6ZeOaR+7ytZNpiPl8EPKkd8h4rzBCMDXyCEHwmhndhkav8u2dLvd8ZbFxWpe90uQor8=@vger.kernel.org, AJvYcCUR76D28iITHQT9P4+vMtJu56JhNbDgmHWtWs+z3GSwUCfKyOUPJ5bBWlNFDECt0X7Mez3m0rJjq4np@vger.kernel.org, AJvYcCUT4GeMaF3dC8z6FNCfGlTH9Zkt/8IpV0zg6SJ7zXYeI8wW8yJ/KaqlLW1n/g+9LVddtNPxalGwgH5Wn2pG@vger.kernel.org, AJvYcCWgFvlwxqiqX9J5ZEUx3greebUJLJvor7kxigiFBdZUQQApqc29koXQBR3QWE7tGIvfprNimSdIJrnw@vger.kernel.org X-Received: by 2002:a05:6102:160a:b0:4c4:f128:3abb with SMTP id ada2fe7eead31-4c9e504d016mr10205575137.25.1744729104858; Tue, 15 Apr 2025 07:58:24 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250407165202.197570-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20250407165202.197570-7-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20250407165202.197570-7-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Tue, 15 Apr 2025 16:58:12 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: ATxdqUF7uCq3d6TZFmW1hFAcHR_xum_PX4q7kLPsABlFSFkCIzYc0BA79FKRuvQ Message-ID: Subject: Re: [PATCH v2 6/9] clk: renesas: rzv2h-cpg: Ignore monitoring CLK_MON bits for external clocks To: Prabhakar Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Biju Das , Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Hi Prabhakar, On Mon, 7 Apr 2025 at 18:52, Prabhakar wrote: > From: Lad Prabhakar > > Ignore CLK_MON bits when turning on/off module clocks that use an external > clock source. > > Introduce the `DEF_MOD_EXTERNAL()` macro for defining module clocks that > may have an external clock source. Update `rzv2h_cpg_register_mod_clk()` > to update mon_index. > > Signed-off-by: Lad Prabhakar > --- a/drivers/clk/renesas/rzv2h-cpg.c > +++ b/drivers/clk/renesas/rzv2h-cpg.c > @@ -569,6 +569,25 @@ static void rzv2h_mod_clock_mstop_disable(struct rzv2h_cpg_priv *priv, > spin_unlock_irqrestore(&priv->rmw_lock, flags); > } > > +static bool rzv2h_mod_clock_is_external(struct rzv2h_cpg_priv *priv, > + u16 ext_clk_offset, > + u8 ext_clk_bit, > + u8 ext_cond) > +{ > + u32 value; > + > + if (!ext_clk_offset) > + return false; > + > + value = readl(priv->base + ext_clk_offset) & BIT(ext_clk_bit); As ext_clk_offset is actually the offset of the Static Mux Control Registers (CPG_SSELm), this reads the current state of the mux. However, can't the state be changed at runtime (despite it being named a "static mux")? > + value >>= ext_clk_bit; > + > + if (value == ext_cond) > + return true; > + > + return false; > +} > + > static int rzv2h_mod_clock_is_enabled(struct clk_hw *hw) > { > struct mod_clock *clock = to_mod_clock(hw); Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds