From mboxrd@z Thu Jan 1 00:00:00 1970 From: Geert Uytterhoeven Subject: Re: [PATCH v4 1/2] dt-bindings: clock: renesas,r9a06g032-sysctrl: Document power Domains Date: Mon, 3 Jun 2019 10:03:02 +0200 Message-ID: References: <1559044467-2639-1-git-send-email-gareth.williams.jx@renesas.com> <1559044467-2639-2-git-send-email-gareth.williams.jx@renesas.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <1559044467-2639-2-git-send-email-gareth.williams.jx@renesas.com> Sender: linux-kernel-owner@vger.kernel.org To: Gareth Williams Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Phil Edworthy , linux-clk , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List List-Id: devicetree@vger.kernel.org On Tue, May 28, 2019 at 1:55 PM Gareth Williams wrote: > The driver is gaining power domain support, so add the new property > to the DT binding and update the examples. > > Signed-off-by: Gareth Williams > Reviewed-by: Geert Uytterhoeven > --- > v4: > - Added missing HCLK to UART0 example to show the clock added > to the driver. > - Added Geert's Reviewed-by line. Thanks for the update, will queue in clock-renesas-for-v5.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds