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[209.85.128.178]) by smtp.gmail.com with ESMTPSA id v6-20020a25ab86000000b00dcda3959006sm1469395ybi.33.2024.02.27.06.17.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Feb 2024 06:17:03 -0800 (PST) Received: by mail-yw1-f178.google.com with SMTP id 00721157ae682-60922e16f6fso10203287b3.3; Tue, 27 Feb 2024 06:17:03 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCW9AtzlqMoTeqjGRbS3KRx+pWzG6uyrKDwtHRq8LkqXbqPrH4Dty32L2yGhRskTf5FGs/4cO+/WRG68cYjxFrb3whW/ilKbCZ/n1PNm/BjmIySS02HGFuJX0wzZxgKu+brgfcSHkkIHgOlQK7uI X-Received: by 2002:a5b:80a:0:b0:dcc:1f6a:d755 with SMTP id x10-20020a5b080a000000b00dcc1f6ad755mr2167596ybp.39.1709043422906; Tue, 27 Feb 2024 06:17:02 -0800 (PST) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240226194715.427597-1-biju.das.jz@bp.renesas.com> <20240226194715.427597-2-biju.das.jz@bp.renesas.com> In-Reply-To: <20240226194715.427597-2-biju.das.jz@bp.renesas.com> From: Geert Uytterhoeven Date: Tue, 27 Feb 2024 15:16:50 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/2] arm64: dts: renesas: rzg2ul-smarc: Enable PMIC and built-in RTC, GPIO and ONKEY To: Biju Das Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Biju, On Mon, Feb 26, 2024 at 8:47=E2=80=AFPM Biju Das wrote: > Enable PMIC DA9062 and the built-in RTC, GPIO and ONKEY modules on the > RZ/{G2UL,Five} SMARC EVK development boards. > > Signed-off-by: Biju Das > --- > v1->v2: > * Dropped disabled status from gpio and onkey nodes. > * Added gpio hog nodes. Thanks for the update! > --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi > @@ -5,6 +5,7 @@ > * Copyright (C) 2022 Renesas Electronics Corp. > */ > > +#include Yep, we need this... > #include "rzg2ul-smarc-pinfunction.dtsi" > #include "rz-smarc-common.dtsi" > > @@ -23,6 +24,63 @@ &cpu_dai { > &i2c0 { > clock-frequency =3D <400000>; > > + da9062: pmic@58 { > + compatible =3D "dlg,da9062"; > + reg =3D <0x58>; > + gpio-controller; > + #gpio-cells =3D <2>; > + > + gpio { > + compatible =3D "dlg,da9062-gpio"; > + }; > + > + onkey { > + compatible =3D "dlg,da9062-onkey"; > + }; > + > + pmic-good-hog { > + gpio-hog; > + gpios =3D <4 0>; ... so this can be replaced by <4 GPIO_ACTIVE_HIGH> ;-) > + output-high; > + line-name =3D "PMIC_PGOOD"; > + }; Same for the other gpios. Anyway, LGTM Reviewed-by: Geert Uytterhoeven i.e. will queue in renesas-devel for v6.10, with s/0/GPIO_ACTIVE_HIGH/. Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds