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[209.85.219.180]) by smtp.gmail.com with ESMTPSA id 00721157ae682-63f10d9f3aasm2935937b3.3.2024.06.21.04.58.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Jun 2024 04:58:32 -0700 (PDT) Received: by mail-yb1-f180.google.com with SMTP id 3f1490d57ef6-dff02b8a956so1883037276.1; Fri, 21 Jun 2024 04:58:32 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCVSK40vUwFL7dmO0h7fBol+wmQZ6OhIehG/MBgM7AOA9g8WMdG+UseCyzaqM5Ew8h/qMzIJnsQRsqMT6dZKK7Szy1fqcOu3eQ59jyXllDXl2TV2p3J0qJEse4PKXzyWlo/1BMUtwksJibOTeSCXAsvTjnco4np6I7fEDBYcv+tLdDzqVMaMNQoMCQYSkttVYTL3AB6qUN1m8HIFpztNEymxY5neUDeL X-Received: by 2002:a25:6ac5:0:b0:dfe:388e:2987 with SMTP id 3f1490d57ef6-e02be228793mr7474675276.64.1718971112323; Fri, 21 Jun 2024 04:58:32 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240613091721.525266-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240613091721.525266-4-prabhakar.mahadev-lad.rj@bp.renesas.com> <4lypqqf4o2wk22kzpyutlaarare5kurdrlokbm6mb4re3mstam@qo7c3d4tcpll> In-Reply-To: <4lypqqf4o2wk22kzpyutlaarare5kurdrlokbm6mb4re3mstam@qo7c3d4tcpll> From: Geert Uytterhoeven Date: Fri, 21 Jun 2024 13:58:20 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC PATCH v2 3/3] mmc: renesas_sdhi: Add support for RZ/V2H(P) SoC To: Wolfram Sang , "Lad, Prabhakar" , Ulf Hansson , linux-mmc@vger.kernel.org, Fabrizio Castro , linux-kernel@vger.kernel.org, Lad Prabhakar , linux-renesas-soc@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , Biju Das , Magnus Damm , devicetree@vger.kernel.org, Conor Dooley Cc: Geert Uytterhoeven Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi all, On Fri, Jun 21, 2024 at 9:54=E2=80=AFAM Wolfram Sang wrote: > > Based on the feedback from Rob I have now changed it to below, i.e. > > the regulator now probes based on regulator-compatible property value > > "vqmmc-r9a09g057-regulator" instead of regulator node name as the > > driver has of_match in regulator_desc. > > I like this a lot! One minor comment. > > > static struct regulator_desc r9a09g057_vqmmc_regulator =3D { > > .of_match =3D of_match_ptr("vqmmc-r9a09g057-regulator"), > > .owner =3D THIS_MODULE, > > .type =3D REGULATOR_VOLTAGE, > > .ops =3D &r9a09g057_regulator_voltage_ops, > > .volt_table =3D r9a09g057_vqmmc_voltages, > > .n_voltages =3D ARRAY_SIZE(r9a09g057_vqmmc_voltages), > > }; > > > > SoC DTSI: > > sdhi1: mmc@15c10000 { > > compatible =3D "renesas,sdhi-r9a09g057"; > > reg =3D <0x0 0x15c10000 0 0x10000>; > > interrupts =3D , > > ; > > clocks =3D <&cpg CPG_MOD 167>, > > <&cpg CPG_MOD 169>, > > <&cpg CPG_MOD 168>, > > <&cpg CPG_MOD 170>; > > clock-names =3D "core", "clkh", "cd", "aclk"; > > resets =3D <&cpg 168>; > > power-domains =3D <&cpg>; > > status =3D "disabled"; > > > > vqmmc_sdhi1: vqmmc-regulator { > > regulator-compatible =3D "vqmmc-r9a09g057-regulator"; renesas,r9a09g057-vqmmc-regulator? > > regulator-name =3D "vqmmc-regulator"; > > This should have "sdhi" somewhere in the name? Indeed. > > > regulator-min-microvolt =3D <1800000>; > > regulator-max-microvolt =3D <3300000>; > > status =3D "disabled"; > > }; > > }; > > > > Board DTS: > > > > &sdhi1 { > > pinctrl-0 =3D <&sdhi1_pins>; > > pinctrl-1 =3D <&sdhi1_pins>; > > pinctrl-names =3D "default", "state_uhs"; > > vmmc-supply =3D <®_3p3v>; > > vqmmc-supply =3D <&vqmmc_sdhi1>; > > bus-width =3D <4>; > > sd-uhs-sdr50; > > sd-uhs-sdr104; > > status =3D "okay"; > > }; > > > > &vqmmc_sdhi1 { > > status =3D "okay"; > > }; > > Again, I like this. It looks like proper HW description to me. > > > Based on the feedback provided Geert ie to use set_pwr callback to set > > PWEN bit and handle IOVS bit in voltage switch callback by dropping > > the regulator altogether. In this case we will have to introduce just > > a single "use-internal-regulator" property and if set make the vqmmc > > regulator optional? > > Let's discuss with Geert. But I am quite convinced of your approach > above. > > > > > Let me know if I have missed something obvious here. > > > > > > Nope, all good. > > Don't give up, I think we are close... The above indeed starts looking good to me. IIUIC, the use of the special vqmmc-r9a09g057-regulator is still optional, and the subnode can be left disabled? E.g. the board designer may still use a (different) GPIO to control the regulator, using "regulator-gpio"? Which brings me to another question: as both the SDmIOVS and SDmPWEN pins can be configured as GPIOs, why not ignore the special handling using the SDm_SD_STATUS register, and use "regulator-gpio" instead? We usually do the same for CD/WP, using "{cd,wp}-gpios" instead. Exceptions are old SH/R-Mobile and R-Car Gen1 boards: arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts: groups =3D "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts: groups =3D "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp"; arch/arm/boot/dts/renesas/r8a7778-bockw.dts: groups =3D "sdhi0_cd", "sdhi0_wp"; arch/arm/boot/dts/renesas/r8a7779-marzen.dts: groups =3D "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts: groups =3D "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp"; Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds