* [PATCH 2/3] arm64: dts: renesas: r9a07g044: Add OSTM nodes
2021-11-10 8:42 [PATCH 0/3] Enable RZ/G2L OSTM support Biju Das
@ 2021-11-10 8:42 ` Biju Das
2021-11-10 8:42 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM Biju Das
1 sibling, 0 replies; 4+ messages in thread
From: Biju Das @ 2021-11-10 8:42 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Add OSTM{0,1,2} nodes to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 485ef5f0fea1..ba149fd41cb6 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -641,6 +641,39 @@
power-domains = <&cpg>;
status = "disabled";
};
+
+ ostm0: timer@12801000 {
+ compatible = "renesas,r9a07g044-ostm",
+ "renesas,rzg2l-ostm";
+ reg = <0x0 0x12801000 0x0 0x400>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G044_OSTM0_PCLK>;
+ resets = <&cpg R9A07G044_OSTM0_PRESETZ>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ostm1: timer@12801400 {
+ compatible = "renesas,r9a07g044-ostm",
+ "renesas,rzg2l-ostm";
+ reg = <0x0 0x12801400 0x0 0x400>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G044_OSTM1_PCLK>;
+ resets = <&cpg R9A07G044_OSTM1_PRESETZ>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ostm2: timer@12801800 {
+ compatible = "renesas,r9a07g044-ostm",
+ "renesas,rzg2l-ostm";
+ reg = <0x0 0x12801800 0x0 0x400>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G044_OSTM2_PCLK>;
+ resets = <&cpg R9A07G044_OSTM2_PRESETZ>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
};
timer {
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM
2021-11-10 8:42 [PATCH 0/3] Enable RZ/G2L OSTM support Biju Das
2021-11-10 8:42 ` [PATCH 2/3] arm64: dts: renesas: r9a07g044: Add OSTM nodes Biju Das
@ 2021-11-10 8:42 ` Biju Das
2021-11-18 10:45 ` Geert Uytterhoeven
1 sibling, 1 reply; 4+ messages in thread
From: Biju Das @ 2021-11-10 8:42 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Enable OSTM{1, 2} interfaces on RZ/G2L SMARC EVK.
OSTM0 is reserved for TF-A.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 7e84a29dddfa..3bea97f16557 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -130,6 +130,14 @@
clock-frequency = <24000000>;
};
+&ostm1 {
+ status = "okay";
+};
+
+&ostm2 {
+ status = "okay";
+};
+
&pinctrl {
adc_pins: adc {
pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread