From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>
Subject: Re: [PATCH 13/14] arm64: dts: renesas: Add Renesas R8A779A0 SoC support
Date: Tue, 8 Sep 2020 19:15:49 +0200 [thread overview]
Message-ID: <CAMuHMdXo2sTP7RmMvd0qquD7bmpPEE7suwvOc9QrnpckdYWm=w@mail.gmail.com> (raw)
In-Reply-To: <1599470390-29719-14-git-send-email-yoshihiro.shimoda.uh@renesas.com>
Hi Shimoda-san,
On Mon, Sep 7, 2020 at 11:20 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Add initial support for the Renesas R8A77990 (R-Car V3U) support.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> + soc: soc {
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a779a0-sysc";
> + reg = <0 0xe6180000 0 0x3078>;
Length 0x4000?
> + #power-domain-cells = <1>;
> + };
> +
> + scif0: serial@e6e60000 {
> + compatible = "renesas,scif-r8a779a0",
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 702>,
> + <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Missing resets property.
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller@f1000000 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0x0 0xf1000000 0 0x20000>,
> + <0x0 0xf1060000 0 0x110000>;
> + interrupts = <GIC_PPI 9
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
"GIC_CPU_MASK_SIMPLE(1)", as currently only one CPU core is used.
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + };
> +
> + prr: chipid@fff00044 {
> + compatible = "renesas,prr";
> + reg = <0 0xfff00044 0 4>;
> + };
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
"GIC_CPU_MASK_SIMPLE(1)" for all 4 interrupts (and in the future "8",
not "2").
> + };
> +};
> --
> 2.7.4
>
--
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2020-09-08 17:16 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-07 9:19 [PATCH 00/14] treewide: add initial support for R-Car V3U Yoshihiro Shimoda
2020-09-07 9:19 ` [PATCH 01/14] dt-bindings: arm: renesas: Document R-Car V3U SoC DT bindings Yoshihiro Shimoda
2020-09-07 15:17 ` Geert Uytterhoeven
2020-09-07 9:19 ` [PATCH 02/14] dt-bindings: arm: renesas: Document Renesas Falcon boards Yoshihiro Shimoda
2020-09-07 15:31 ` Geert Uytterhoeven
2020-09-08 1:01 ` Yoshihiro Shimoda
2020-09-08 7:11 ` Geert Uytterhoeven
2020-09-08 8:45 ` Yoshihiro Shimoda
2020-09-10 9:10 ` Geert Uytterhoeven
2020-09-10 9:12 ` Yoshihiro Shimoda
2020-09-07 9:19 ` [PATCH 03/14] dt-bindings: power: renesas,rcar-sysc: Document r8a779a0 SYSC binding Yoshihiro Shimoda
2020-09-08 8:08 ` Geert Uytterhoeven
2020-09-07 9:19 ` [PATCH 04/14] dt-bindings: power: Add r8a779a0 SYSC power domain definitions Yoshihiro Shimoda
2020-09-08 8:39 ` Geert Uytterhoeven
2020-09-08 8:48 ` Yoshihiro Shimoda
2020-09-07 9:19 ` [PATCH 05/14] dt-bindings: reset: renesas,rst: Document r8a779a0 reset module Yoshihiro Shimoda
2020-09-08 8:46 ` Geert Uytterhoeven
2020-09-07 9:19 ` [PATCH 06/14] dt-bindings: clock: renesas,cpg-mssr: Document r8a779a0 Yoshihiro Shimoda
2020-09-08 9:23 ` Geert Uytterhoeven
2020-09-08 17:17 ` Geert Uytterhoeven
2020-09-15 15:42 ` Rob Herring
2020-09-07 9:19 ` [PATCH 07/14] dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions Yoshihiro Shimoda
2020-09-08 9:23 ` Geert Uytterhoeven
2020-09-08 9:38 ` Geert Uytterhoeven
2020-09-09 1:05 ` Yoshihiro Shimoda
2020-09-07 9:19 ` [PATCH 08/14] dt-bindings: serial: renesas,scif: Document r8a779a0 bindings Yoshihiro Shimoda
2020-09-08 9:39 ` Geert Uytterhoeven
2020-09-15 15:43 ` Rob Herring
2020-09-07 9:19 ` [PATCH 09/14] soc: renesas: identify R-Car V3U Yoshihiro Shimoda
2020-09-08 9:43 ` Geert Uytterhoeven
2020-09-07 9:19 ` [PATCH 10/14] soc: renesas: r8a779a0-sysc: Add r8a779a0 support Yoshihiro Shimoda
2020-09-08 11:20 ` Geert Uytterhoeven
2020-09-09 12:45 ` Yoshihiro Shimoda
2020-09-07 9:19 ` [PATCH 11/14] soc: renesas: rcar-rst: Add support for R-Car V3U Yoshihiro Shimoda
2020-09-08 11:36 ` Geert Uytterhoeven
2020-09-10 4:45 ` Yoshihiro Shimoda
2020-09-10 6:28 ` Geert Uytterhoeven
2020-09-07 9:19 ` [PATCH 12/14] clk: renesas: cpg-mssr: " Yoshihiro Shimoda
2020-09-08 15:22 ` Geert Uytterhoeven
2020-09-09 2:52 ` Yoshihiro Shimoda
2020-09-09 6:47 ` Geert Uytterhoeven
2020-09-07 9:19 ` [PATCH 13/14] arm64: dts: renesas: Add Renesas R8A779A0 SoC support Yoshihiro Shimoda
2020-09-08 17:15 ` Geert Uytterhoeven [this message]
2020-09-10 11:03 ` Yoshihiro Shimoda
2020-09-07 9:19 ` [PATCH 14/14] arm64: dts: renesas: Add Renesas Falcon boards support Yoshihiro Shimoda
2020-09-08 17:20 ` Geert Uytterhoeven
2020-09-10 11:04 ` Yoshihiro Shimoda
2020-09-10 11:13 ` Geert Uytterhoeven
2020-09-10 11:24 ` Yoshihiro Shimoda
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