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[209.85.128.172]) by smtp.gmail.com with ESMTPSA id 00721157ae682-658e483ed3asm15124217b3.23.2024.07.12.08.23.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Jul 2024 08:23:20 -0700 (PDT) Received: by mail-yw1-f172.google.com with SMTP id 00721157ae682-654ce021660so22167077b3.1; Fri, 12 Jul 2024 08:23:20 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCV+PsDTQLqS1wp4wgeFXnQ94a1GLXHxkAZL0LGiff9IXOjpKZSqLdNEKzo7tTk5s98erSc3JV1Ph/ka7HX3NckidShsu7NUDh0o+5aMTm6nQVo4OrECfQzYC7fVD2egqHXF/zQuXOfEkKCWjysMlV916SKW4z0RAvH9e24CNKPQ7EVI/Wfd7zSCZwtNlLy/9t6z677dPIbG8DmQAogOvZM1yHN8UcWB X-Received: by 2002:a05:690c:dd3:b0:62f:b04c:2442 with SMTP id 00721157ae682-658ee7912d5mr149730507b3.7.1720797799770; Fri, 12 Jul 2024 08:23:19 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240627161315.98143-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240627161315.98143-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Fri, 12 Jul 2024 17:23:07 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 2/3] clk: renesas: Add family-specific clock driver for RZ/V2H(P) To: "Lad, Prabhakar" Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Magnus Damm , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prabhakar, On Fri, Jul 12, 2024 at 5:14=E2=80=AFPM Lad, Prabhakar wrote: > On Fri, Jul 12, 2024 at 12:59=E2=80=AFPM Geert Uytterhoeven > > On Thu, Jun 27, 2024 at 6:14=E2=80=AFPM Prabhakar wrote: > > > From: Lad Prabhakar > > > > > > Add family-specific clock driver for RZ/V2H(P) SoCs. > > > > > > Signed-off-by: Lad Prabhakar > > > --- > > > v2->v3 > > > - Dropped num_hw_resets from struct rzv2h_cpg_priv > > > - Dropped range_check for module clocks > > > - Made mon_index to s8 instead of u8 in struct rzv2h_mod_clk > > > - Added support for critical module clocks with DEF_MOD_CRITICAL > > > - Added check for mon_index in rzv2h_mod_clock_endisable and > > > rzv2h_mod_clock_is_enabled() > > > --- /dev/null > > > +++ b/drivers/clk/renesas/rzv2h-cpg.h > > > +/** > > > + * struct rzv2h_reset - Reset definitions > > > + * > > > + * @reset_index: reset register index > > > + * @reset_bit: reset bit > > > + * @mon_index: monitor register index > > > + * @mon_bit: monitor bit > > > + */ > > > +struct rzv2h_reset { > > > + u8 reset_index; > > > + u8 reset_bit; > > > + u8 mon_index; > > > + u8 mon_bit; > > > +}; > > > + > > > +#define RST_ID(x, y) ((((x) * 16)) + (y)) > > > + > > > +#define DEF_RST_BASE(_id, _resindex, _resbit, _monindex, _monbit) = \ > > > + [_id] =3D { \ > > > > Indexing by _id means the reset array will be very sparse. E.g. the > > innocent-looking r9a09g057_resets[] with only a single entry takes > > 600 bytes. > > > > If you do need the full array for indexing, please allocate and > > populate it at runtime. > > > OK, I will use the radix tree for resets (is that OK)? You mean XArray? include/linux/radix-tree.h has: /* Keep unconverted code working */ #define radix_tree_root xarray #define radix_tree_node xa_node Given a single xa_node is already 576 bytes, just allocating the full linear reset array at runtime is probably better. Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds