From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AFF5C433E6 for ; Sun, 30 Aug 2020 13:12:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0F3AE20757 for ; Sun, 30 Aug 2020 13:12:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lztvxZTK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728761AbgH3NMJ (ORCPT ); Sun, 30 Aug 2020 09:12:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726030AbgH3NMG (ORCPT ); Sun, 30 Aug 2020 09:12:06 -0400 Received: from mail-io1-xd41.google.com (mail-io1-xd41.google.com [IPv6:2607:f8b0:4864:20::d41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA697C061573 for ; Sun, 30 Aug 2020 06:12:06 -0700 (PDT) Received: by mail-io1-xd41.google.com with SMTP id b16so3433628ioj.4 for ; Sun, 30 Aug 2020 06:12:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ky7RGqnB3nEYZuhDWZg3ymidYnH0V7KhM8TSpX/Q31U=; b=lztvxZTKxduMPYlVazEzxIzqqk9pYCp6sBPjtF5OzNRGvi+Wa2MEkJV465M6aACEF3 ZRs/0mVTPoXzz4Ok6emO0yCasMjWolNviqOHwxK52APFuEZZqv7cAUY0T/JvYQ8lgxZ8 wpQ7RqXfPC9BV13MJtt/W3RYkE6JhpRM/1XBURRGP3Jl50bmjDXsufUDmj6VeqJRmQbP GwVVBUO4cXRSEierZRu/NpdMelia0BYgCiuc0y3paj+1mBhzhBE4irxNt0nF1UIhWwqD +5ywRnz+Zj0JZCzJZfiA80kTh3SFdtAIohW0ztGvu/lKOOKthp4ZiQTES8szHml0ORne yt5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ky7RGqnB3nEYZuhDWZg3ymidYnH0V7KhM8TSpX/Q31U=; b=dVxQhOL5zdOTDuBQPgT2wnnKlg/b7Jezb5UlP/iGN7IlBCnwHNCWW+aKovRBreVAT2 bB+tA6tjeYPvOFp0m5OcY6KaXOCFQ5mhklLPNXW2H5q8YDkQVQXd5jY6eS3So4RzOCaj 9QV0oEGFyVJZqvIkYE1HNmP1BbHt7qvwrZZ7fEIyCn1/BDblBQROfkb+sah53Zk29FF2 nD5IaW5pZHEeghqsXqMVzTlK0/XEbzwCNJ/AF1hSzk/PpDojdkXEQG3N4T6N0uPq9ywS iBkbooSxE7nSeBb7asFS13m0qiMD775bgEs3xOhm8ixSqyrH3II7IjiZUyn+9p0pDOQK OZuw== X-Gm-Message-State: AOAM530m9B2t5RaXQbN+tcsy0z3gqYEl54Zvi/MWuKwK7YdHDe1gYEqb v1Yp9VdpNDgA6c2L7g1siemTGj9Xo995V6AvOkw= X-Google-Smtp-Source: ABdhPJw5zO8vATsaTW2UhLmnknjkiNKOkPQUklYrvkX1WUjxsK/y1x2I2nsxtyiBiwFE2jBvuSrz0uwiNN6+CuuBj2A= X-Received: by 2002:a02:730b:: with SMTP id y11mr8460860jab.126.1598793123756; Sun, 30 Aug 2020 06:12:03 -0700 (PDT) MIME-Version: 1.0 References: <20200820121323.564-1-linux.amoon@gmail.com> <20200820121323.564-2-linux.amoon@gmail.com> <7hlfi9xgch.fsf@baylibre.com> <1j7dto3ylq.fsf@starbuckisacylon.baylibre.com> <1j4koq4x38.fsf@starbuckisacylon.baylibre.com> In-Reply-To: From: Anand Moon Date: Sun, 30 Aug 2020 18:41:52 +0530 Message-ID: Subject: Re: [PATCH v3 1/2] arm64: dts: meson-g12b-odroid-n2: Enable RTC controller node To: Martin Blumenstingl Cc: Jerome Brunet , Neil Armstrong , Kevin Hilman , devicetree , linux-arm-kernel , linux-amlogic@lists.infradead.org, Rob Herring , Christian Hewitt Content-Type: text/plain; charset="UTF-8" Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Martin, On Sun, 30 Aug 2020 at 01:26, Martin Blumenstingl wrote: > > Hi Anand > > (I haven't re-read all of this discussion, so apologies if something > in my reply doesn't make sense) > > On Sat, Aug 29, 2020 at 6:31 PM Anand Moon wrote: > [...] > > Just want to clear my confusion on RTC INT gpio setting is not needed. > > I did not find any other example to support this changes. > > So I have enable the debug logs on rtc-pcf8563.c with this current > > patch at my end. > my understanding is that your testing procedure is to simply use your > original patch and see if rtc wake-up is working. > since GPIOAO_7 is not explicitly mentioned in your testing procedure > I'm assuming that you're not configuring it anywhere. Yes... > Kevin's concern is what happens when that GPIO is configured > incorrectly (for example by some u-boot bug, firmware issue, ...). for > example: have you tried to configure GPIOAO_7 in u-boot as output low > pin and see if rtc wake-up is still working? Yes I will check this later. Meanwhile I have checked this feature with _mainline u-boot_ and _odroid-n2 u-boot_ and the result is that rtc wakeup works. > > In your previous replies you mentioned various pin mux settings > related to TSIN_A_DIN0 // TDMB_FS // TDMB_SLV_FS > I don't know how those are related to the RTC > My suggestion is to look at > arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi - it has a > eth_phy_irq_pins definition and apply something similar on Odroid-N2 > Thanks for your suggestion, I have given this a try see below. But any new pinctrl setting leads to RTC probe failure. # dmesg | grep rtc [ 5.308536] meson-vrtc ff8000a8.rtc: registered as rtc1 [ 5.483978] rtc-pcf8563 0-0051: pcf8563_probe [ 5.487549] rtc-pcf8563 0-0051: pcf8563_write_block_data: err=-6 addr=0e, data=03 [ 5.490116] rtc-pcf8563 0-0051: pcf8563_probe: write error [ 5.552763] rtc-pcf8563: probe of 0-0051 failed with error -5 ------------------&------------------------------------ $ git diff arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts index 35a31cf181e2..dad54f8a947f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts @@ -206,6 +206,15 @@ vddao_3v3: regulator-vddao_3v3 { regulator-always-on; }; + /* Make sure the rtc irq pin is properly configured as input */ + rtc_irq_pins: rtc-pin-irq { + mux { + groups = "GPIOAO_7"; + function = "gpio_periphs"; + bias-disable; + }; + }; + hdmi-connector { compatible = "hdmi-connector"; type = "a"; @@ -481,7 +490,8 @@ hdmi_tx_tmds_out: endpoint { &i2c3 { pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&rtc_irq_pins>; + pinctrl-names = "default", "gpio_periphs"; status = "okay"; rtc0: rtc@51 { -Anand