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From: Shaik Ameer Basha <shaik.samsung@gmail.com>
To: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Shaik Ameer Basha <shaik.ameer@samsung.com>,
	Linux Samsung SOC <linux-samsung-soc@vger.kernel.org>,
	Linux DeviceTree <devicetree@vger.kernel.org>,
	Linux ARM Kernel <linux-arm-kernel@lists.infradead.org>,
	Mike Turquette <mturquette@linaro.org>,
	Kukjin Kim <kgene.kim@samsung.com>,
	Tomasz Figa <t.figa@samsung.com>, sunil joshi <joshi@samsung.com>,
	Rahul Sharma <r.sh.open@gmail.com>,
	alim.akhtar@samsung.com, Rahul Sharma <rahul.sharma@samsung.com>
Subject: Re: [PATCH v4 14/15] clk: exynos5420: add misc clocks
Date: Wed, 7 May 2014 17:30:17 +0530	[thread overview]
Message-ID: <CAOD6ATo2AL8AFDbhRK8FSNVE+XYGai2Z7D-S-bxtA70h7RLvzQ@mail.gmail.com> (raw)
In-Reply-To: <536920A5.1090502@gmail.com>

Hi Tomasz,

On Tue, May 6, 2014 at 11:19 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Shaik,
>
>
> On 06.05.2014 18:26, Shaik Ameer Basha wrote:
>>
>> This patch adds some missing miscellaneous clocks specific
>> to exynos5420.
>>
>> Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
>> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
>> ---
>>   drivers/clk/samsung/clk-exynos5420.c   |   14 +++++++++++---
>>   include/dt-bindings/clock/exynos5420.h |    2 ++
>>   2 files changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/samsung/clk-exynos5420.c
>> b/drivers/clk/samsung/clk-exynos5420.c
>> index e0e749d..e69e820 100644
>> --- a/drivers/clk/samsung/clk-exynos5420.c
>> +++ b/drivers/clk/samsung/clk-exynos5420.c
>> @@ -273,7 +273,8 @@ PNAME(mout_group5_p) = {"mout_sclk_vpll",
>> "mout_sclk_dpll"};
>>
>>   PNAME(mout_fimd1_final_p) = {"mout_fimd1", "mout_fimd1_opt"};
>>   PNAME(mout_sw_aclk66_p)       = {"dout_aclk66", "mout_sclk_spll"};
>> -PNAME(mout_user_aclk66_peric_p)        = { "fin_pll", "mout_sw_aclk66" };
>> +PNAME(mout_user_aclk66_peric_p)        = { "fin_pll", "mout_sw_aclk66"};
>> +PNAME(mout_user_pclk66_gpio_p) = {"mout_sw_aclk66", "ffactor_sw_aclk66"};
>>
>>   PNAME(mout_sw_aclk200_fsys_p) = {"dout_aclk200_fsys", "mout_sclk_spll"};
>>   PNAME(mout_sw_pclk200_fsys_p) = {"dout_pclk200_fsys", "mout_sclk_spll"};
>> @@ -372,10 +373,13 @@ static struct samsung_fixed_rate_clock
>> exynos5420_fixed_rate_clks[] __initdata =
>>   };
>>
>>   static struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[]
>> __initdata = {
>> -       FFACTOR(0, "sclk_hsic_12m", "fin_pll", 1, 2, 0),
>> +       FFACTOR(0, "ffactor_hsic_12m", "fin_pll", 1, 2, 0),
>> +       FFACTOR(0, "ffactor_sw_aclk66", "mout_sw_aclk66", 1, 2, 0),
>
>
> Is the "ffactor_" prefix also present in the datasheet? If not, it should be
> removed from clock names as well.

Its not there in manual.
As we are differentiating muxes and dividers with "mout" and "dout"
this prefix is added
to differentiate fixed factor clocks.

shall I keep it or not?

Regards,
Shaik Ameer Basha

>
> Best regards,
> Tomasz

  reply	other threads:[~2014-05-07 12:00 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-06 16:26 [PATCH v4 00/15] exynos5420: clock file cleanup Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 01/15] clk: exynos5420: Rename mux parent arrays Shaik Ameer Basha
2014-05-06 18:01   ` Tomasz Figa
2014-05-07 12:01     ` Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 02/15] clk: exynos5420: add clocks for ISP block Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 04/15] clk: exynos5420: fix parent clocks for mscl sysmmu Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 05/15] clk: exynos5420: update clocks for G2D and G3D blocks Shaik Ameer Basha
2014-05-06 16:50   ` Tomasz Figa
2014-05-06 16:26 ` [PATCH v4 06/15] clk: exynos5420: update clocks for DISP1 block Shaik Ameer Basha
2014-05-06 17:18   ` Tomasz Figa
2014-05-07 12:39     ` Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 07/15] clk: exynos5420: update clocks for PERIC block Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 08/15] clk: exynos5420: update clocks for PERIS and GEN blocks Shaik Ameer Basha
2014-05-06 17:36   ` Tomasz Figa
2014-05-07 12:28     ` Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 09/15] clk: exynos5420: clk: exynos5420: update clocks for WCORE block Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 10/15] clk: exynos5420: update clocks for FSYS and FSYS2 blocks Shaik Ameer Basha
2014-05-06 17:43   ` Tomasz Figa
2014-05-07 12:14     ` Shaik Ameer Basha
2014-05-06 16:26 ` [PATCH v4 13/15] clk: exynos5420: update clocks for MAU Block Shaik Ameer Basha
     [not found]   ` <1399393610-23394-14-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-05-06 17:47     ` Tomasz Figa
     [not found] ` <1399393610-23394-1-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-05-06 16:26   ` [PATCH v4 03/15] clk: exynos5420: update clocks for GSCL and MSCL blocks Shaik Ameer Basha
2014-05-06 16:26   ` [PATCH v4 11/15] clk: exynos5420: correct sysmmu-mfc parent clocks Shaik Ameer Basha
2014-05-06 17:44     ` Tomasz Figa
2014-05-06 16:26   ` [PATCH v4 12/15] clk: exynos5420: fix register offset for sclk_bpll Shaik Ameer Basha
2014-05-06 16:26   ` [PATCH v4 14/15] clk: exynos5420: add misc clocks Shaik Ameer Basha
2014-05-06 17:49     ` Tomasz Figa
2014-05-07 12:00       ` Shaik Ameer Basha [this message]
2014-05-07 17:16         ` Tomasz Figa
2014-05-06 16:26   ` [PATCH v4 15/15] clk: exynos5420: add more registers to restore list Shaik Ameer Basha

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