From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A2E1C2D0A3 for ; Fri, 6 Nov 2020 07:38:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CB482208FE for ; Fri, 6 Nov 2020 07:37:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=atishpatra.org header.i=@atishpatra.org header.b="RTsENuCe" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726485AbgKFHh7 (ORCPT ); Fri, 6 Nov 2020 02:37:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725848AbgKFHh6 (ORCPT ); Fri, 6 Nov 2020 02:37:58 -0500 Received: from mail-il1-x142.google.com (mail-il1-x142.google.com [IPv6:2607:f8b0:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1CDEC0613D2 for ; Thu, 5 Nov 2020 23:37:58 -0800 (PST) Received: by mail-il1-x142.google.com with SMTP id x20so279080ilj.8 for ; Thu, 05 Nov 2020 23:37:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=aQB4ocSHoyHmpaIbRxFj/zt6XeUHDR7wBHeEyE4bZfQ=; b=RTsENuCeCOpH73nAqLoeSA8PnD2zhQpcop4R++RTXBfDDPYpcj5zxao2ls+it7Jbbc LpSMJBNT9K/5TF5LylVK2+P26EjNPL4ZjGOH4ngNffiea15xSmo/RgBDj1zwhxQehnE7 bAeKKD0dDcHV0XQg0465baqRrt8CeFC9dpK3Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=aQB4ocSHoyHmpaIbRxFj/zt6XeUHDR7wBHeEyE4bZfQ=; b=R4jyX1J29B8zyRadM5yprk6g6ZI4R616AFzxmg1QRZGPWTjH+icHo44UFtjKYaqMsa bdt3/ggX0Q1B8L7lFsyfGi1TGMTatIM0EHUuoACjQ57s7ny6NgGVO2ch4fqteLu4m9ir ITNimMD+Ha9Bpl6fmFChkRZl4WfvyyaN1knz9qZKOJBtRxUuja+SM164BnYQAAbApPa2 t0iZiEyUZh7kfPfG8djJTEH7EoLbdWZxQBZtjI+iAVM/uHGvTYwCicENsEnu2B/O0y09 yOPCShq1eootWXRnod4S1w0wQgUH+8OimEwcawz+vUr8H+oc3eV0VoUTJFkeZQvKS0uS IQ7A== X-Gm-Message-State: AOAM533lFJkdOg8WwwIKQhDZqkPjJrHw9hBRCW2L+4k7hI0vH6xOJPrL bZWGoL5mhMRQKBKBuM/d2su8ugqztMfq8VRycowvAc3SRwnkt9w= X-Google-Smtp-Source: ABdhPJzim1SBWXT2HkwUxRQYC66JPOOSOS7b965ESES+ZyL8w7EM2XoU657RReCH3oyTptlRc3S7dz8Y3knO6Kjv4LA= X-Received: by 2002:a92:6410:: with SMTP id y16mr510995ilb.126.1604648278164; Thu, 05 Nov 2020 23:37:58 -0800 (PST) MIME-Version: 1.0 References: <20201028232759.1928479-1-atish.patra@wdc.com> In-Reply-To: From: Atish Patra Date: Thu, 5 Nov 2020 23:37:45 -0800 Message-ID: Subject: Re: [RFC PATCH 0/3] Add Microchip PolarFire Soc Support To: Palmer Dabbelt Cc: Atish Patra , devicetree@vger.kernel.org, Albert Ou , Cyril.Jean@microchip.com, Daire McNamara , Anup Patel , "linux-kernel@vger.kernel.org List" , Rob Herring , Alistair Francis , Paul Walmsley , linux-riscv , Padmarao Begari Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Nov 5, 2020 at 11:14 PM Palmer Dabbelt wrote: > > On Wed, 28 Oct 2020 16:27:56 PDT (-0700), Atish Patra wrote: > > This series adds minimal support for Microchip Polar Fire Soc Icicle kit. > > It is rebased on v5.10-rc1 and depends on clock support. > > Only MMC and ethernet drivers are enabled via this series. > > The idea here is to add the foundational patches so that other drivers > > can be added to on top of this. > > > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. > > The following qemu series is necessary to test it on Qemu. > > > > The series can also be found at the following github repo. > > > > I noticed the latest version of mmc driver[2] hangs on the board with > > the latest clock driver. That's why, I have tested with the old clock > > driver available in the above github repo. > > OK, I guess that's why it's an RFC? > Yes. The latest clock/pcie driver did not work for me. I might have missed something in DT. The idea for RFC is so that anybody who wants to try the latest kernel on a polarfire board has a meaningful way to test it. > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html > > [2] https://www.spinics.net/lists/devicetree/msg383626.html > > Looks like this one hasn't been merged yet. IDK if something is broken with my > mail client but I'm not seeing any github repos. If this depends on > not-yet-merged drivers then it's certainly RFC material, but aside from the DT > stuff (which should be straight-forward) it seems fine to me. > I think it makes sense to take this series once the clock driver is merged at least. > Since you posted this an an RFC I'm going to assume you're going to re-spin it. > Yes. There are some feedbacks on DT which I will fix in v2. > Thanks! > > > > > Atish Patra (3): > > RISC-V: Add Microchip PolarFire SoC kconfig option > > RISC-V: Initial DTS for Microchip ICICLE board > > RISC-V: Enable Microchip PolarFire ICICLE SoC > > > > arch/riscv/Kconfig.socs | 7 + > > arch/riscv/boot/dts/Makefile | 1 + > > arch/riscv/boot/dts/microchip/Makefile | 2 + > > .../microchip/microchip-icicle-kit-a000.dts | 313 ++++++++++++++++++ > > arch/riscv/configs/defconfig | 4 + > > 5 files changed, 327 insertions(+) > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-icicle-kit-a000.dts > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv -- Regards, Atish