From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: MIME-Version: 1.0 References: <20190828162617.237398-1-tmaimon77@gmail.com> <20190828162617.237398-3-tmaimon77@gmail.com> <20190829104721.tnjk3bqt3cq6iagr@holly.lan> In-Reply-To: <20190829104721.tnjk3bqt3cq6iagr@holly.lan> From: Tomer Maimon Date: Mon, 9 Sep 2019 17:31:30 +0300 Message-ID: Subject: Re: [PATCH v1 2/2] hwrng: npcm: add NPCM RNG driver Content-Type: multipart/alternative; boundary="00000000000056f64d05921f8470" To: Daniel Thompson Cc: mpm@selenic.com, herbert@gondor.apana.org.au, Arnd Bergmann , Greg KH , Rob Herring , Mark Rutland , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , sumit.garg@linaro.org, jens.wiklander@linaro.org, vkoul@kernel.org, Thomas Gleixner , Joel Stanley , devicetree , Linux Kernel Mailing List , linux-crypto@vger.kernel.org, OpenBMC Maillist List-ID: --00000000000056f64d05921f8470 Content-Type: text/plain; charset="UTF-8" Hi Daniel, appreciate your comments and sorry for the late reply On Thu, 29 Aug 2019 at 13:47, Daniel Thompson wrote: > On Wed, Aug 28, 2019 at 07:26:17PM +0300, Tomer Maimon wrote: > > Add Nuvoton NPCM BMC Random Number Generator(RNG) driver. > > > > Signed-off-by: Tomer Maimon > > --- > > drivers/char/hw_random/Kconfig | 13 ++ > > drivers/char/hw_random/Makefile | 1 + > > drivers/char/hw_random/npcm-rng.c | 207 ++++++++++++++++++++++++++++++ > > 3 files changed, 221 insertions(+) > > create mode 100644 drivers/char/hw_random/npcm-rng.c > > > > diff --git a/drivers/char/hw_random/npcm-rng.c > b/drivers/char/hw_random/npcm-rng.c > > new file mode 100644 > > index 000000000000..5b4b1b6cb362 > > --- /dev/null > > +++ b/drivers/char/hw_random/npcm-rng.c > > @@ -0,0 +1,207 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +// Copyright (c) 2019 Nuvoton Technology corporation. > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define NPCM_RNGCS_REG 0x00 /* Control and status > register */ > > +#define NPCM_RNGD_REG 0x04 /* Data register */ > > +#define NPCM_RNGMODE_REG 0x08 /* Mode register */ > > + > > +#define NPCM_RNG_CLK_SET_25MHZ GENMASK(4, 3) /* 20-25 MHz */ > > +#define NPCM_RNG_DATA_VALID BIT(1) > > +#define NPCM_RNG_ENABLE BIT(0) > > +#define NPCM_RNG_M1ROSEL BIT(1) > > + > > +#define NPCM_RNG_TIMEOUT_POLL 20 > > Might be better to define this in real-world units (such as > milliseconds) since the timeout is effectively the longest time the > hardware can take to generate 4 bytes. > > > + > > +#define to_npcm_rng(p) container_of(p, struct npcm_rng, rng) > > + > > +struct npcm_rng { > > + void __iomem *base; > > + struct hwrng rng; > > +}; > > + > > +static int npcm_rng_init(struct hwrng *rng) > > +{ > > + struct npcm_rng *priv = to_npcm_rng(rng); > > + u32 val; > > + > > + val = readl(priv->base + NPCM_RNGCS_REG); > > + val |= NPCM_RNG_ENABLE; > > + writel(val, priv->base + NPCM_RNGCS_REG); > > + > > + return 0; > > +} > > + > > +static void npcm_rng_cleanup(struct hwrng *rng) > > +{ > > + struct npcm_rng *priv = to_npcm_rng(rng); > > + u32 val; > > + > > + val = readl(priv->base + NPCM_RNGCS_REG); > > + val &= ~NPCM_RNG_ENABLE; > > + writel(val, priv->base + NPCM_RNGCS_REG); > > +} > > + > > +static bool npcm_rng_wait_ready(struct hwrng *rng, bool wait) > > +{ > > + struct npcm_rng *priv = to_npcm_rng(rng); > > + int timeout_cnt = 0; > > + int ready; > > + > > + ready = readl(priv->base + NPCM_RNGCS_REG) & NPCM_RNG_DATA_VALID; > > + while ((ready == 0) && (timeout_cnt < NPCM_RNG_TIMEOUT_POLL)) { > > + usleep_range(500, 1000); > > + ready = readl(priv->base + NPCM_RNGCS_REG) & > > + NPCM_RNG_DATA_VALID; > > + timeout_cnt++; > > + } > > + > > + return !!ready; > > +} > > This looks like an open-coded version of readl_poll_timeout()... better > to use the library function. > > Also the sleep looks a bit long to me. What is the generation rate of > the peripheral? Most RNG drivers have short intervals between data > generation so they use delays rather than sleeps (a.k.a. > readl_poll_timeout_atomic() ). > > the HWRNG generate byte of random data in a few milliseconds so it is better to use the sleep command. > > > + > > +static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool > wait) > > +{ > > + struct npcm_rng *priv = to_npcm_rng(rng); > > + int retval = 0; > > + > > + pm_runtime_get_sync((struct device *)priv->rng.priv); > > + > > + while (max >= sizeof(u32)) { > > + if (!npcm_rng_wait_ready(rng, wait)) > > + break; > > The code as currently written does not honour the wait parameter (e.g. > it sleeps even when wait is false). > > > > + > > + *(u32 *)buf = readl(priv->base + NPCM_RNGD_REG); > > + retval += sizeof(u32); > > + buf += sizeof(u32); > > + max -= sizeof(u32); > > + } > > + > > + pm_runtime_mark_last_busy((struct device *)priv->rng.priv); > > + pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv); > > + > > + return retval || !wait ? retval : -EIO; > > +} > > + > > +static int npcm_rng_probe(struct platform_device *pdev) > > +{ > > + struct npcm_rng *priv; > > + struct resource *res; > > + u32 quality; > > + int ret; > > + > > + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); > > + if (!priv) > > + return -ENOMEM; > > + > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + priv->base = devm_ioremap_resource(&pdev->dev, res); > > + if (IS_ERR(priv->base)) > > + return PTR_ERR(priv->base); > > + > > + priv->rng.name = pdev->name; > > +#ifndef CONFIG_PM > > + priv->rng.init = npcm_rng_init; > > + priv->rng.cleanup = npcm_rng_cleanup; > > +#endif > > + priv->rng.read = npcm_rng_read; > > + priv->rng.priv = (unsigned long)&pdev->dev; > > + if (of_property_read_u32(pdev->dev.of_node, "quality", &quality)) > > + priv->rng.quality = 1000; > > + else > > + priv->rng.quality = quality; > > + > > + writel(NPCM_RNG_M1ROSEL, priv->base + NPCM_RNGMODE_REG); > > +#ifndef CONFIG_PM > > + writel(NPCM_RNG_CLK_SET_25MHZ, priv->base + NPCM_RNGCS_REG); > > +#else > > + writel(NPCM_RNG_CLK_SET_25MHZ | NPCM_RNG_ENABLE, > > + priv->base + NPCM_RNGCS_REG); > > +#endif > > If this initialization was moved to npcm_rng_init() then there would be > no need for the additional ifdefing. It would also get rid of the > (potentially slow) readl calls on the PM wakeup path. > But when the Kernel have PM configuration than the priv->rng.init is not set and *add_early_randomness* function is called. for the *add_early_randomness* success the hwrng need to enabled in the probe. I will remove the ifdef and add local variable instead (as Milton Miller suggested) > > + > > + ret = devm_hwrng_register(&pdev->dev, &priv->rng); > > + if (ret) { > > + dev_err(&pdev->dev, "Failed to register rng device: %d\n", > > + ret); > > + return ret; > > + } > > + > > + dev_set_drvdata(&pdev->dev, priv); > > + pm_runtime_set_autosuspend_delay(&pdev->dev, 100); > > + pm_runtime_use_autosuspend(&pdev->dev); > > + pm_runtime_enable(&pdev->dev); > > + > > + dev_info(&pdev->dev, "Random Number Generator Probed\n"); > > Does the user need to know this every time we boot? There are lots of > debug tools we can bring to bear if they are worried the device > isn't probing. > > > Daniel. > > > > + > > + return 0; > > +} > > + > > +static int npcm_rng_remove(struct platform_device *pdev) > > +{ > > + struct npcm_rng *priv = platform_get_drvdata(pdev); > > + > > + hwrng_unregister(&priv->rng); > > + pm_runtime_disable(&pdev->dev); > > + pm_runtime_set_suspended(&pdev->dev); > > + > > + return 0; > > +} > > + > > +#ifdef CONFIG_PM > > +static int npcm_rng_runtime_suspend(struct device *dev) > > +{ > > + struct npcm_rng *priv = dev_get_drvdata(dev); > > + > > + npcm_rng_cleanup(&priv->rng); > > + > > + return 0; > > +} > > + > > +static int npcm_rng_runtime_resume(struct device *dev) > > +{ > > + struct npcm_rng *priv = dev_get_drvdata(dev); > > + > > + return npcm_rng_init(&priv->rng); > > +} > > +#endif > > + > > +static const struct dev_pm_ops npcm_rng_pm_ops = { > > + SET_RUNTIME_PM_OPS(npcm_rng_runtime_suspend, > > + npcm_rng_runtime_resume, NULL) > > + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, > > + pm_runtime_force_resume) > > +}; > > + > > +static const struct of_device_id rng_dt_id[] = { > > + { .compatible = "nuvoton,npcm750-rng", }, > > + {}, > > +}; > > +MODULE_DEVICE_TABLE(of, rng_dt_id); > > + > > +static struct platform_driver npcm_rng_driver = { > > + .driver = { > > + .name = "npcm-rng", > > + .pm = &npcm_rng_pm_ops, > > + .owner = THIS_MODULE, > > + .of_match_table = of_match_ptr(rng_dt_id), > > + }, > > + .probe = npcm_rng_probe, > > + .remove = npcm_rng_remove, > > +}; > > + > > +module_platform_driver(npcm_rng_driver); > > + > > +MODULE_DESCRIPTION("Nuvoton NPCM Random Number Generator Driver"); > > +MODULE_AUTHOR("Tomer Maimon "); > > +MODULE_LICENSE("GPL v2"); > > -- > > 2.18.0 > > > Thanks a lot, Tomer --00000000000056f64d05921f8470 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Daniel,

appreciate = your comments and sorry for the late reply

On Thu, 29 Aug 2019 at 13:4= 7, Daniel Thompson <daniel= .thompson@linaro.org> wrote:
On Wed, Aug 28, 2019 at 07:26:17PM +0300, Tomer Maimon = wrote:
> Add Nuvoton NPCM BMC Random Number Generator(RNG) driver.
>
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>=C2=A0 drivers/char/hw_random/Kconfig=C2=A0 =C2=A0 |=C2=A0 13 ++
>=C2=A0 drivers/char/hw_random/Makefile=C2=A0 =C2=A0|=C2=A0 =C2=A01 + >=C2=A0 drivers/char/hw_random/npcm-rng.c | 207 ++++++++++++++++++++++++= ++++++
>=C2=A0 3 files changed, 221 insertions(+)
>=C2=A0 create mode 100644 drivers/char/hw_random/npcm-rng.c
>
> diff --git a/drivers/char/hw_random/npcm-rng.c b/drivers/char/hw_rando= m/npcm-rng.c
> new file mode 100644
> index 000000000000..5b4b1b6cb362
> --- /dev/null
> +++ b/drivers/char/hw_random/npcm-rng.c
> @@ -0,0 +1,207 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2019 Nuvoton Technology corporation.
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/init.h>
> +#include <linux/random.h>
> +#include <linux/err.h>
> +#include <linux/platform_device.h>
> +#include <linux/hw_random.h>
> +#include <linux/delay.h>
> +#include <linux/of_irq.h>
> +#include <linux/pm_runtime.h>
> +
> +#define NPCM_RNGCS_REG=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A00x00=C2=A0 =C2=A0 /* Control and status register */
> +#define NPCM_RNGD_REG=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 0x04=C2=A0 =C2=A0 /* Data register */
> +#define NPCM_RNGMODE_REG=C2=A0 =C2=A0 =C2=A00x08=C2=A0 =C2=A0 /* Mode= register */
> +
> +#define NPCM_RNG_CLK_SET_25MHZ=C2=A0 =C2=A0 =C2=A0 =C2=A0GENMASK(4, 3= ) /* 20-25 MHz */
> +#define NPCM_RNG_DATA_VALID=C2=A0 BIT(1)
> +#define NPCM_RNG_ENABLE=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 BIT(0)
> +#define NPCM_RNG_M1ROSEL=C2=A0 =C2=A0 =C2=A0BIT(1)
> +
> +#define NPCM_RNG_TIMEOUT_POLL=C2=A0 =C2=A0 =C2=A0 =C2=A0 20

Might be better to define this in real-world units (such as
milliseconds) since the timeout is effectively the longest time the
hardware can take to generate 4 bytes.

> +
> +#define to_npcm_rng(p)=C2=A0 =C2=A0 =C2=A0 =C2=A0container_of(p, stru= ct npcm_rng, rng)
> +
> +struct npcm_rng {
> +=C2=A0 =C2=A0 =C2=A0void __iomem *base;
> +=C2=A0 =C2=A0 =C2=A0struct hwrng rng;
> +};
> +
> +static int npcm_rng_init(struct hwrng *rng)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D to_npcm_rng(rng);
> +=C2=A0 =C2=A0 =C2=A0u32 val;
> +
> +=C2=A0 =C2=A0 =C2=A0val =3D readl(priv->base + NPCM_RNGCS_REG); > +=C2=A0 =C2=A0 =C2=A0val |=3D NPCM_RNG_ENABLE;
> +=C2=A0 =C2=A0 =C2=A0writel(val, priv->base + NPCM_RNGCS_REG);
> +
> +=C2=A0 =C2=A0 =C2=A0return 0;
> +}
> +
> +static void npcm_rng_cleanup(struct hwrng *rng)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D to_npcm_rng(rng);
> +=C2=A0 =C2=A0 =C2=A0u32 val;
> +
> +=C2=A0 =C2=A0 =C2=A0val =3D readl(priv->base + NPCM_RNGCS_REG); > +=C2=A0 =C2=A0 =C2=A0val &=3D ~NPCM_RNG_ENABLE;
> +=C2=A0 =C2=A0 =C2=A0writel(val, priv->base + NPCM_RNGCS_REG);
> +}
> +
> +static bool npcm_rng_wait_ready(struct hwrng *rng, bool wait)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D to_npcm_rng(rng);
> +=C2=A0 =C2=A0 =C2=A0int timeout_cnt =3D 0;
> +=C2=A0 =C2=A0 =C2=A0int ready;
> +
> +=C2=A0 =C2=A0 =C2=A0ready =3D readl(priv->base + NPCM_RNGCS_REG) &= amp; NPCM_RNG_DATA_VALID;
> +=C2=A0 =C2=A0 =C2=A0while ((ready =3D=3D 0) && (timeout_cnt &= lt; NPCM_RNG_TIMEOUT_POLL)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0usleep_range(500, 100= 0);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ready =3D readl(priv-= >base + NPCM_RNGCS_REG) &
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0NPCM_RNG_DATA_VALID;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0timeout_cnt++;
> +=C2=A0 =C2=A0 =C2=A0}
> +
> +=C2=A0 =C2=A0 =C2=A0return !!ready;
> +}

This looks like an open-coded version of readl_poll_timeout()... better
to use the library function.

Also the sleep looks a bit long to me. What is the generation rate of
the peripheral? Most RNG drivers have short intervals between data
generation so they use delays rather than sleeps (a.k.a.
readl_poll_timeout_atomic() ).

the HWRNG generate byte of random data in a few milli= seconds so it is better to use the sleep command.=C2=A0

> +
> +static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bo= ol wait)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D to_npcm_rng(rng);
> +=C2=A0 =C2=A0 =C2=A0int retval =3D 0;
> +
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_get_sync((struct device *)priv->rng= .priv);
> +
> +=C2=A0 =C2=A0 =C2=A0while (max >=3D sizeof(u32)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (!npcm_rng_wait_re= ady(rng, wait))
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0break;

The code as currently written does not honour the wait parameter (e.g.
it sleeps even when wait is false).


> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*(u32 *)buf =3D readl= (priv->base + NPCM_RNGD_REG);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0retval +=3D sizeof(u3= 2);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0buf +=3D sizeof(u32);=
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0max -=3D sizeof(u32);=
> +=C2=A0 =C2=A0 =C2=A0}
> +
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_mark_last_busy((struct device *)priv-&= gt;rng.priv);
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_put_sync_autosuspend((struct device *)= priv->rng.priv);
> +
> +=C2=A0 =C2=A0 =C2=A0return retval || !wait ? retval : -EIO;
> +}
> +
> +static int npcm_rng_probe(struct platform_device *pdev)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv;
> +=C2=A0 =C2=A0 =C2=A0struct resource *res;
> +=C2=A0 =C2=A0 =C2=A0u32 quality;
> +=C2=A0 =C2=A0 =C2=A0int ret;
> +
> +=C2=A0 =C2=A0 =C2=A0priv =3D devm_kzalloc(&pdev->dev, sizeof(*= priv), GFP_KERNEL);
> +=C2=A0 =C2=A0 =C2=A0if (!priv)
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return -ENOMEM;
> +
> +=C2=A0 =C2=A0 =C2=A0res =3D platform_get_resource(pdev, IORESOURCE_ME= M, 0);
> +=C2=A0 =C2=A0 =C2=A0priv->base =3D devm_ioremap_resource(&pdev= ->dev, res);
> +=C2=A0 =C2=A0 =C2=A0if (IS_ERR(priv->base))
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return PTR_ERR(priv-&= gt;base);
> +
> +=C2=A0 =C2=A0 =C2=A0priv->rng.name =3D pdev->name;
> +#ifndef CONFIG_PM
> +=C2=A0 =C2=A0 =C2=A0priv->rng.init =3D npcm_rng_init;
> +=C2=A0 =C2=A0 =C2=A0priv->rng.cleanup =3D npcm_rng_cleanup;
> +#endif
> +=C2=A0 =C2=A0 =C2=A0priv->rng.read =3D npcm_rng_read;
> +=C2=A0 =C2=A0 =C2=A0priv->rng.priv =3D (unsigned long)&pdev-&g= t;dev;
> +=C2=A0 =C2=A0 =C2=A0if (of_property_read_u32(pdev->dev.of_node, &q= uot;quality", &quality))
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0priv->rng.quality = =3D 1000;
> +=C2=A0 =C2=A0 =C2=A0else
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0priv->rng.quality = =3D quality;
> +
> +=C2=A0 =C2=A0 =C2=A0writel(NPCM_RNG_M1ROSEL, priv->base + NPCM_RNG= MODE_REG);
> +#ifndef CONFIG_PM
> +=C2=A0 =C2=A0 =C2=A0writel(NPCM_RNG_CLK_SET_25MHZ, priv->base + NP= CM_RNGCS_REG);
> +#else
> +=C2=A0 =C2=A0 =C2=A0writel(NPCM_RNG_CLK_SET_25MHZ | NPCM_RNG_ENABLE,<= br> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 priv->base + NPCM_RNGCS_= REG);
> +#endif

If this initialization was moved to npcm_rng_init() then there would be
no need for the additional ifdefing. It would also get rid of the
(potentially slow) readl calls on the PM wakeup path.
= =C2=A0
But when the Kernel have PM configuration than the priv-&g= t;rng.init is not set and=C2=A0
= add_early_randomness=C2=A0function is called. for the=C2=A0add_early_randomness=C2=A0success
the hwrng n= eed to enabled in the probe.

I will remove th= e ifdef and add local=C2=A0variable=C2=A0instead (as Milton Miller sug= gested)



> +
> +=C2=A0 =C2=A0 =C2=A0ret =3D devm_hwrng_register(&pdev->dev, &a= mp;priv->rng);
> +=C2=A0 =C2=A0 =C2=A0if (ret) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dev_err(&pdev->= ;dev, "Failed to register rng device: %d\n",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0ret);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return ret;
> +=C2=A0 =C2=A0 =C2=A0}
> +
> +=C2=A0 =C2=A0 =C2=A0dev_set_drvdata(&pdev->dev, priv);
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_set_autosuspend_delay(&pdev->de= v, 100);
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_use_autosuspend(&pdev->dev); > +=C2=A0 =C2=A0 =C2=A0pm_runtime_enable(&pdev->dev);
> +
> +=C2=A0 =C2=A0 =C2=A0dev_info(&pdev->dev, "Random Number G= enerator Probed\n");

Does the user need to know this every time we boot? There are lots of
debug tools we can bring to bear if they are worried the device
isn't probing.


Daniel.


> +
> +=C2=A0 =C2=A0 =C2=A0return 0;
> +}
> +
> +static int npcm_rng_remove(struct platform_device *pdev)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D platform_get_drvdata(pd= ev);
> +
> +=C2=A0 =C2=A0 =C2=A0hwrng_unregister(&priv->rng);
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_disable(&pdev->dev);
> +=C2=A0 =C2=A0 =C2=A0pm_runtime_set_suspended(&pdev->dev);
> +
> +=C2=A0 =C2=A0 =C2=A0return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int npcm_rng_runtime_suspend(struct device *dev)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D dev_get_drvdata(dev); > +
> +=C2=A0 =C2=A0 =C2=A0npcm_rng_cleanup(&priv->rng);
> +
> +=C2=A0 =C2=A0 =C2=A0return 0;
> +}
> +
> +static int npcm_rng_runtime_resume(struct device *dev)
> +{
> +=C2=A0 =C2=A0 =C2=A0struct npcm_rng *priv =3D dev_get_drvdata(dev); > +
> +=C2=A0 =C2=A0 =C2=A0return npcm_rng_init(&priv->rng);
> +}
> +#endif
> +
> +static const struct dev_pm_ops npcm_rng_pm_ops =3D {
> +=C2=A0 =C2=A0 =C2=A0SET_RUNTIME_PM_OPS(npcm_rng_runtime_suspend,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 npcm_rng_runtime_resume, NULL)
> +=C2=A0 =C2=A0 =C2=A0SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,=
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0pm_runtime_force_resume)
> +};
> +
> +static const struct of_device_id rng_dt_id[] =3D {
> +=C2=A0 =C2=A0 =C2=A0{ .compatible =3D "nuvoton,npcm750-rng"= ,=C2=A0 },
> +=C2=A0 =C2=A0 =C2=A0{},
> +};
> +MODULE_DEVICE_TABLE(of, rng_dt_id);
> +
> +static struct platform_driver npcm_rng_driver =3D {
> +=C2=A0 =C2=A0 =C2=A0.driver =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "npcm-rng",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.pm=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D &npcm_rng_pm_ops,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.owner=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D THIS_MODULE,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.of_match_table =3D o= f_match_ptr(rng_dt_id),
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.probe=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D npcm= _rng_probe,
> +=C2=A0 =C2=A0 =C2=A0.remove=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D npcm= _rng_remove,
> +};
> +
> +module_platform_driver(npcm_rng_driver);
> +
> +MODULE_DESCRIPTION("Nuvoton NPCM Random Number Generator Driver&= quot;);
> +MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>");
> +MODULE_LICENSE("GPL v2");
> --
> 2.18.0
>

Thanks a lot,

Tomer=C2=A0
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