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AJvYcCV5eqp0VNvui0vUvxCrmxKAYHOdbd0W1g/dWJTPuAV/tP3FVX2EiL2VM/SMRrOQAvAn2WzRhobIy1GS@vger.kernel.org X-Gm-Message-State: AOJu0Yx1e6zMFGnm4RQoVPamy3eNRaY4+hEd1pCiexTV9sCIbKdtdP0e HhdIevIthIjiiY2xyaY9r98LO1ZViQrZBi22bZ93GJE8OYFEndvPMkJP4Dho5Q3XPEP5Gj5x9Dl Nl6sReSgRFGyUMCt55X5LWgC0wuOE+vKiCnIRJhSHLw== X-Gm-Gg: ASbGncvyU9A731IEjrnLodU6oHdzw1KL3oMhPfVI5RX4oQmTRZc9NBkfKxbEjtP+KGC hEsI10VHOtn7S6T3Lhriw200Rc0aL6JnpntlA9PLa0pZcGru8H+UzRG5TGklngqs2E86U4d29/R btnTjLv6ZfmeDnTdOJo0ZhwcQPq+Y5sG6NaFM0mnFFEjzeQuUrjSzLfFXLqYBlooKg615iKTFav JfX6g== X-Google-Smtp-Source: AGHT+IEiUE/ZBe/h6CTv9oXmV/520CYO08VrAKRH9DK2kLKicjLwLKXfuc77q+NFZWV5/udeIZCHd/ZkZBNSaus2ZAI= X-Received: by 2002:a05:6902:1208:b0:e93:36f3:573c with SMTP id 3f1490d57ef6-e9336f35958mr7576548276.5.1755365186241; Sat, 16 Aug 2025 10:26:26 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250815070500.3275491-1-ivo.ivanov.ivanov1@gmail.com> <20250815070500.3275491-4-ivo.ivanov.ivanov1@gmail.com> In-Reply-To: <20250815070500.3275491-4-ivo.ivanov.ivanov1@gmail.com> From: Sam Protsenko Date: Sat, 16 Aug 2025 12:26:15 -0500 X-Gm-Features: Ac12FXxe2rWnXKWQd1X34M41uQmxOqzmaGTi-5t45-ucTyoZet0Hf0j8vH7V5Mg Message-ID: Subject: Re: [PATCH v3 3/4] arm64: dts: exynos2200: increase the size of all syscons To: Ivaylo Ivanov Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Aug 15, 2025 at 2:06=E2=80=AFAM Ivaylo Ivanov wrote: > > As IP cores are aligned by 0x10000, increase the size of all system > register instances to the maximum (0x10000) to allow using accessing > registers over the currently set limit. > > Suggested-by: Sam Protsenko > Signed-off-by: Ivaylo Ivanov > > --- > Did not add the r-b from Sam, as the patch is pretty much completely > reworked, including the description. Please send it again :). > --- Reviewed-by: Sam Protsenko > arch/arm64/boot/dts/exynos/exynos2200.dtsi | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot= /dts/exynos/exynos2200.dtsi > index 943e83851..b3a8933a4 100644 > --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi > @@ -306,7 +306,7 @@ cmu_peric0: clock-controller@10400000 { > > syscon_peric0: syscon@10420000 { > compatible =3D "samsung,exynos2200-peric0-sysreg"= , "syscon"; > - reg =3D <0x10420000 0x2000>; > + reg =3D <0x10420000 0x10000>; > }; > > pinctrl_peric0: pinctrl@10430000 { > @@ -328,7 +328,7 @@ cmu_peric1: clock-controller@10700000 { > > syscon_peric1: syscon@10720000 { > compatible =3D "samsung,exynos2200-peric1-sysreg"= , "syscon"; > - reg =3D <0x10720000 0x2000>; > + reg =3D <0x10720000 0x10000>; > }; > > pinctrl_peric1: pinctrl@10730000 { > @@ -418,7 +418,7 @@ cmu_ufs: clock-controller@11000000 { > > syscon_ufs: syscon@11020000 { > compatible =3D "samsung,exynos2200-ufs-sysreg", "= syscon"; > - reg =3D <0x11020000 0x2000>; > + reg =3D <0x11020000 0x10000>; > }; > > pinctrl_ufs: pinctrl@11040000 { > @@ -450,7 +450,7 @@ cmu_peric2: clock-controller@11c00000 { > > syscon_peric2: syscon@11c20000 { > compatible =3D "samsung,exynos2200-peric2-sysreg"= , "syscon"; > - reg =3D <0x11c20000 0x4000>; > + reg =3D <0x11c20000 0x10000>; > }; > > pinctrl_peric2: pinctrl@11c30000 { > @@ -471,7 +471,7 @@ cmu_cmgp: clock-controller@14e00000 { > > syscon_cmgp: syscon@14e20000 { > compatible =3D "samsung,exynos2200-cmgp-sysreg", = "syscon"; > - reg =3D <0x14e20000 0x2000>; > + reg =3D <0x14e20000 0x10000>; > }; > > pinctrl_cmgp: pinctrl@14e30000 { > -- > 2.43.0 > >