From: Sam Protsenko <semen.protsenko@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Chanwoo Choi <cw00.choi@samsung.com>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Chanho Park <chanho61.park@samsung.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Tomasz Figa <tomasz.figa@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Stephen Boyd <sboyd@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
David Virag <virag.david003@gmail.com>,
Sumit Semwal <sumit.semwal@linaro.org>
Subject: Re: [PATCH v2 0/6] clk: samsung: exynos850: Add missing clocks for PM
Date: Tue, 7 Mar 2023 11:37:17 -0600 [thread overview]
Message-ID: <CAPLW+4nZF2POmD1kRUDktn2_gUWH_e84Lnqx=8qhuqbSnrdJ2A@mail.gmail.com> (raw)
In-Reply-To: <3a27febc-4d4e-1cfd-45dc-6ade4f25ca13@linaro.org>
On Tue, 7 Mar 2023 at 01:47, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 06/03/2023 19:55, Sam Protsenko wrote:
> > On Mon, 6 Mar 2023 at 09:51, Krzysztof Kozlowski
> > <krzysztof.kozlowski@linaro.org> wrote:
> >>
> >> On 06/03/2023 15:28, Krzysztof Kozlowski wrote:
> >>> On Wed, 22 Feb 2023 22:21:27 -0600, Sam Protsenko wrote:
> >>>> As a part of preparation for PM enablement in Exynos850 clock driver,
> >>>> this patch series implements CMU_G3D, and also main gate clocks for AUD
> >>>> and HSI CMUs. The series brings corresponding changes to bindings, the
> >>>> driver and SoC dts file.
> >>>>
> >>>> Changes in v2:
> >>>> - Rebased all patches on top of the most recent soc/for-next tree
> >>>> - Added A-b and R-b tags
> >>>> - Minor fixes
> >>>>
> >>>> [...]
> >>>
> >>> Applied, thanks!
> >>>
> >>> [1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
> >>> https://git.kernel.org/krzk/linux/c/067ba1605806e52118bb598afb357718df9f0e19
> >>> [2/6] dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
> >>> https://git.kernel.org/krzk/linux/c/e289665ed0d6df9fca3ebc128f1232d305e4600b
> >>> [3/6] clk: samsung: clk-pll: Implement pll0818x PLL type
> >>> https://git.kernel.org/krzk/linux/c/a6feedab8ab9a9e4483deb0bcc87919d92c88b7e
> >>> [4/6] clk: samsung: exynos850: Implement CMU_G3D domain
> >>> https://git.kernel.org/krzk/linux/c/c5704a56893b4e77e434597c7c53d878bb3073b0
> >>> [5/6] clk: samsung: exynos850: Add AUD and HSI main gate clocks
> >>> https://git.kernel.org/krzk/linux/c/d8d12e0d079aff4b1d8079a0a55944c0596f1d67
> >>> [6/6] arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC
> >>> https://git.kernel.org/krzk/linux/c/ad8f6ad9a4f219950df65731a8ff91baa022c4b0
> >>
> >> And builds are broken. Please mention in cover letter or commit
> >> dependencies and ordering...
> >>
> >
> > Just checked all most recent commits on your for-next and next/clk
> > branches. Seem to build fine for me. AFAIR I checked all patches in
> > that series, and I guess there shouldn't be any issues if you apply
> > those in the same order they are numbered inside the series. Or you
> > mean you have some clash between different series? Anyways, I'm glad
> > to help, but I'd need more details on where exactly the problem is (or
> > maybe you already fixed it?).
>
> The builds were failing after I applied everything to respective
> branches (so DTS separate). I did not notice that your DTS and driver
> (both) depend on bindings header constant. This requires special
> handling. It actually always required, because it was going through
> different trees. Now it goes through my tree, but I still need to handle
> it. I reworked the branches and force-pushed, thus you did not see the
> exact issue.
>
Thanks for explaining this. Next time I'll provide the dependencies
info in my patch #0.
> Best regards,
> Krzysztof
>
prev parent reply other threads:[~2023-03-07 17:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-23 4:21 [PATCH v2 0/6] clk: samsung: exynos850: Add missing clocks for PM Sam Protsenko
2023-02-23 4:21 ` [PATCH v2 1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D Sam Protsenko
2023-02-23 4:21 ` [PATCH v2 2/6] dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks Sam Protsenko
2023-02-23 4:21 ` [PATCH v2 3/6] clk: samsung: clk-pll: Implement pll0818x PLL type Sam Protsenko
2023-02-23 4:21 ` [PATCH v2 4/6] clk: samsung: exynos850: Implement CMU_G3D domain Sam Protsenko
2023-02-23 4:21 ` [PATCH v2 5/6] clk: samsung: exynos850: Add AUD and HSI main gate clocks Sam Protsenko
2023-02-23 4:21 ` [PATCH v2 6/6] arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC Sam Protsenko
[not found] ` <CGME20230223042126epcas2p11c50a7be714a7f305d743faa68dee3ca@epcms2p5>
2023-02-27 3:56 ` [PATCH v2 5/6] clk: samsung: exynos850: Add AUD and HSI main gate clocks CHANHO PARK
2023-03-06 14:28 ` [PATCH v2 0/6] clk: samsung: exynos850: Add missing clocks for PM Krzysztof Kozlowski
2023-03-06 15:51 ` Krzysztof Kozlowski
2023-03-06 18:55 ` Sam Protsenko
2023-03-07 7:47 ` Krzysztof Kozlowski
2023-03-07 17:37 ` Sam Protsenko [this message]
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