Re: [PATCH 3/5] clk/exynos5250: add sclk_hdmiphy in the list of special clocks

[Rahul Sharma <r.sh.open@gmail.com>]

+Mike

On Mon, Jun 10, 2013 at 4:31 PM, Rahul Sharma <rahul.sharma@samsung.com> wrote:
> hdmi driver needs hdmiphy clock which is one of the parent
> for hdmi mux clock. This is required while changing the parent
> of mux clock.
>
> Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
> ---
>  Documentation/devicetree/bindings/clock/exynos5250-clock.txt |    1 +
>  drivers/clk/samsung/clk-exynos5250.c                         |    3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
> index b337147..f333d61 100644
> --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
> @@ -59,6 +59,7 @@ clock which they consume.
>    sclk_spi0            154
>    sclk_spi1            155
>    sclk_spi2            156
> +  sclk_hdmiphy         157
>
>
>     [Peripheral Clock Gates]
> diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
> index 587d913..88cdb13 100644
> --- a/drivers/clk/samsung/clk-exynos5250.c
> +++ b/drivers/clk/samsung/clk-exynos5250.c
> @@ -87,6 +87,7 @@ enum exynos5250_clks {
>         sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3,
>         sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm,
>         sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2,
> +       sclk_hdmiphy,
>
>         /* gate clocks */
>         gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0,
> @@ -199,7 +200,7 @@ struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = {
>
>  /* fixed rate clocks generated inside the soc */
>  struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = {
> -       FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000),
> +       FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000),
>         FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000),
>         FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000),
>         FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000),
> --
> 1.7.10.4
>
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