* [PATCH v3 02/23] fdt: Add function to return next compatible subnode [not found] <1333408743-28720-1-git-send-email-sjg@chromium.org> @ 2012-04-02 23:18 ` Simon Glass [not found] ` <1333408743-28720-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 1 sibling, 0 replies; 7+ messages in thread From: Simon Glass @ 2012-04-02 23:18 UTC (permalink / raw) To: U-Boot Mailing List; +Cc: Devicetree Discuss, Tom Warren, Jerry Van Baren We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v3: - Add new fdtdec_next_compatible_subnode() patch include/fdtdec.h | 17 +++++++++++++++++ lib/fdtdec.c | 15 +++++++++++++++ 2 files changed, 32 insertions(+), 0 deletions(-) diff --git a/include/fdtdec.h b/include/fdtdec.h index 84f0768..0351a25 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -117,6 +117,23 @@ int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id); /** + * Find the next compatible subnode for a peripheral. + * + * Do the first call with node set to the parent and depth = 0. This + * function will return the offset of the next compatible node. Next time + * you call this function, pass the node value returned last time, with + * depth unchanged, and the next node will be provided. + * + * @param blob FDT blob to use + * @param node Start node for search + * @param id Compatible ID to look for (enum fdt_compat_id) + * @param depthp Current depth (set to 0 before first call) + * @return offset of next compatible node, or -FDT_ERR_NOTFOUND if no more + */ +int fdtdec_next_compatible_subnode(const void *blob, int node, + enum fdt_compat_id id, int *depthp); + +/** * Look up an address property in a node and return it as an address. * The property must hold either one address with no trailing data or * one address with a length. This is only tested on 32-bit machines. diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 4a5ab71..76d3808 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -133,6 +133,21 @@ int fdtdec_next_compatible(const void *blob, int node, return fdt_node_offset_by_compatible(blob, node, compat_names[id]); } +int fdtdec_next_compatible_subnode(const void *blob, int node, + enum fdt_compat_id id, int *depthp) +{ + do { + node = fdt_next_node(blob, node, depthp); + } while (*depthp > 1); + + /* If this is a direct subnode, and compatible, return it */ + if (*depthp == 1 && 0 == fdt_node_check_compatible( + blob, node, compat_names[id])) + return node; + + return -FDT_ERR_NOTFOUND; +} + int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id, int *upto) { -- 1.7.7.3 ^ permalink raw reply related [flat|nested] 7+ messages in thread
[parent not found: <1333408743-28720-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>]
* [PATCH v3 01/23] fdt: Add function to locate an array in the device tree [not found] ` <1333408743-28720-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> @ 2012-04-02 23:18 ` Simon Glass 2012-04-02 23:19 ` [PATCH v3 20/23] fdt: tegra: Add EMC node to " Simon Glass 2012-04-02 23:19 ` [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard Simon Glass 2 siblings, 0 replies; 7+ messages in thread From: Simon Glass @ 2012-04-02 23:18 UTC (permalink / raw) To: U-Boot Mailing List; +Cc: Devicetree Discuss, Tom Warren, Jerry Van Baren fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> --- Changes in v2: - Add new fdtdec_locate_array() function include/fdtdec.h | 19 +++++++++++++++++++ lib/fdtdec.c | 11 +++++++++++ 2 files changed, 30 insertions(+), 0 deletions(-) diff --git a/include/fdtdec.h b/include/fdtdec.h index 171c628..84f0768 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -272,6 +272,25 @@ int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, u32 *array, int count); /** + * Look up a property in a node and return a pointer to its contents as a + * unsigned int array of given length. The property must have at least enough + * data for the array ('count' cells). It may have more, but this will be + * ignored. The data is not copied. + * + * Note that you must access elements of the array with fdt32_to_cpu(), + * since the elements will be big endian even on a little endian machine. + * + * @param blob FDT blob + * @param node node to examine + * @param prop_name name of property to find + * @param count number of array elements + * @return pointer to array if found, or NULL if the property is not + * found or there is not enough data + */ +const u32 *fdtdec_locate_array(const void *blob, int node, + const char *prop_name, int count); + +/** * Look up a boolean property in a node and return it. * * A boolean properly is true if present in the device tree and false if not diff --git a/lib/fdtdec.c b/lib/fdtdec.c index bdec1a0..4a5ab71 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -363,6 +363,17 @@ int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, return err; } +const u32 *fdtdec_locate_array(const void *blob, int node, + const char *prop_name, int count) +{ + const u32 *cell; + int err; + + cell = get_prop_check_min_len(blob, node, prop_name, + sizeof(u32) * count, &err); + return err ? NULL : cell; +} + int fdtdec_get_bool(const void *blob, int node, const char *prop_name) { const s32 *cell; -- 1.7.7.3 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v3 20/23] fdt: tegra: Add EMC node to device tree [not found] ` <1333408743-28720-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2012-04-02 23:18 ` [PATCH v3 01/23] fdt: Add function to locate an array in the device tree Simon Glass @ 2012-04-02 23:19 ` Simon Glass 2012-04-02 23:19 ` [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard Simon Glass 2 siblings, 0 replies; 7+ messages in thread From: Simon Glass @ 2012-04-02 23:19 UTC (permalink / raw) To: U-Boot Mailing List Cc: Stephen Warren, Devicetree Discuss, Jerry Van Baren, Tom Warren Add a definition of the memory controller node according to the bindings here: http://patchwork.ozlabs.org/patch/132928/ Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> --- arch/arm/dts/tegra20.dtsi | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index d5ca02c..bc64f42 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -193,4 +193,11 @@ clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */ }; + emc@7000f400 { + #address-cells = < 1 >; + #size-cells = < 0 >; + compatible = "nvidia,tegra20-emc"; + reg = <0x7000f400 0x200>; + }; + }; -- 1.7.7.3 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard [not found] ` <1333408743-28720-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2012-04-02 23:18 ` [PATCH v3 01/23] fdt: Add function to locate an array in the device tree Simon Glass 2012-04-02 23:19 ` [PATCH v3 20/23] fdt: tegra: Add EMC node to " Simon Glass @ 2012-04-02 23:19 ` Simon Glass 2012-04-03 5:22 ` Olof Johansson 2 siblings, 1 reply; 7+ messages in thread From: Simon Glass @ 2012-04-02 23:19 UTC (permalink / raw) To: U-Boot Mailing List Cc: Stephen Warren, Devicetree Discuss, Jerry Van Baren, Tom Warren This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> --- board/nvidia/dts/tegra2-seaboard.dts | 72 ++++++++++++++++++++++++++++++++++ 1 files changed, 72 insertions(+), 0 deletions(-) diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts index 6ba3ec4..31e0f9d 100644 --- a/board/nvidia/dts/tegra2-seaboard.dts +++ b/board/nvidia/dts/tegra2-seaboard.dts @@ -89,4 +89,76 @@ i2c@7000c500 { clock-frequency = <100000>; }; + + emc@7000f400 { + emc-table@166500 { + reg = <166500>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 166500 >; + nvidia,emc-registers = < 0x0000000a 0x00000021 + 0x00000008 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x000004df + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000a 0x000000c8 + 0x00000003 0x00000006 0x00000004 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xa04004ae + 0x007fd010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + emc-table@333000 { + reg = <333000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 333000 >; + nvidia,emc-registers = < 0x00000014 0x00000041 + 0x0000000f 0x00000005 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000005 0x00000005 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x000009ff + 0x00000000 0x00000003 0x00000003 0x00000005 + 0x00000005 0x00000001 0x0000000f 0x000000c8 + 0x00000003 0x0000000c 0x00000006 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe034048b + 0x007e8010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + + emc-table@190000 { + reg = < 190000 >; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 190000 >; + nvidia,emc-registers = < 0x0000000c 0x00000026 + 0x00000009 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x0000059f + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000b 0x000000c8 + 0x00000003 0x00000007 0x00000004 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xa06204ae + 0x007dc010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + emc-table@380000 { + reg = < 380000 >; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 380000 >; + nvidia,emc-registers = < 0x00000017 0x0000004b + 0x00000012 0x00000006 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000006 0x00000006 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x00000b5f + 0x00000000 0x00000003 0x00000003 0x00000006 + 0x00000006 0x00000001 0x00000011 0x000000c8 + 0x00000003 0x0000000e 0x00000007 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe044048b + 0x007d8010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + }; }; -- 1.7.7.3 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard 2012-04-02 23:19 ` [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard Simon Glass @ 2012-04-03 5:22 ` Olof Johansson 2012-04-04 0:47 ` Simon Glass 0 siblings, 1 reply; 7+ messages in thread From: Olof Johansson @ 2012-04-03 5:22 UTC (permalink / raw) To: Simon Glass Cc: U-Boot Mailing List, Devicetree Discuss, Stephen Warren, Jerry Van Baren, Tom Warren On Mon, Apr 2, 2012 at 4:19 PM, Simon Glass <sjg@chromium.org> wrote: > This adds timings for T20 and T25 Seaboards, using the bindings found here: > > http://patchwork.ozlabs.org/patch/132928/ > > We supply both full speed options for normal running, and half speed options > for testing / development. > > Signed-off-by: Simon Glass <sjg@chromium.org> This seems incorrect to me. You provide both T20 and T25 EMC tables in the same device tree with no way to determine which one to use. Unfortunately nvidia didn't use the boot straps to tell if they were on a t20 or t25 seaboard, so you'll just have to know. At the kernel side we chose to just ditch T20 since most boards still in use are T25. -Olof ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard 2012-04-03 5:22 ` Olof Johansson @ 2012-04-04 0:47 ` Simon Glass 2012-04-05 21:58 ` Simon Glass 0 siblings, 1 reply; 7+ messages in thread From: Simon Glass @ 2012-04-04 0:47 UTC (permalink / raw) To: Olof Johansson Cc: U-Boot Mailing List, Devicetree Discuss, Stephen Warren, Jerry Van Baren, Tom Warren Hi Olof, On Mon, Apr 2, 2012 at 10:22 PM, Olof Johansson <olof@lixom.net> wrote: > On Mon, Apr 2, 2012 at 4:19 PM, Simon Glass <sjg@chromium.org> wrote: >> This adds timings for T20 and T25 Seaboards, using the bindings found here: >> >> http://patchwork.ozlabs.org/patch/132928/ >> >> We supply both full speed options for normal running, and half speed options >> for testing / development. >> >> Signed-off-by: Simon Glass <sjg@chromium.org> > > This seems incorrect to me. You provide both T20 and T25 EMC tables in > the same device tree with no way to determine which one to use. > > Unfortunately nvidia didn't use the boot straps to tell if they were > on a t20 or t25 seaboard, so you'll just have to know. At the kernel > side we chose to just ditch T20 since most boards still in use are > T25. The selection of memory speed is down to the board. There is a later patch in this series (just cc'd to you) which looks at the SOC ID to determine whether it is T20 or T25, and selects the speed accordingly. This speed is used to look up the correct table in the device tree > > > > -Olof Regards, Simon ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard 2012-04-04 0:47 ` Simon Glass @ 2012-04-05 21:58 ` Simon Glass 0 siblings, 0 replies; 7+ messages in thread From: Simon Glass @ 2012-04-05 21:58 UTC (permalink / raw) To: Olof Johansson Cc: U-Boot Mailing List, Devicetree Discuss, Stephen Warren, Jerry Van Baren, Tom Warren Hi, On Tue, Apr 3, 2012 at 5:47 PM, Simon Glass <sjg@chromium.org> wrote: > Hi Olof, > > On Mon, Apr 2, 2012 at 10:22 PM, Olof Johansson <olof@lixom.net> wrote: >> On Mon, Apr 2, 2012 at 4:19 PM, Simon Glass <sjg@chromium.org> wrote: >>> This adds timings for T20 and T25 Seaboards, using the bindings found here: >>> >>> http://patchwork.ozlabs.org/patch/132928/ >>> >>> We supply both full speed options for normal running, and half speed options >>> for testing / development. >>> >>> Signed-off-by: Simon Glass <sjg@chromium.org> >> >> This seems incorrect to me. You provide both T20 and T25 EMC tables in >> the same device tree with no way to determine which one to use. >> >> Unfortunately nvidia didn't use the boot straps to tell if they were >> on a t20 or t25 seaboard, so you'll just have to know. At the kernel >> side we chose to just ditch T20 since most boards still in use are >> T25. > > The selection of memory speed is down to the board. There is a later > patch in this series (just cc'd to you) which looks at the SOC ID to > determine whether it is T20 or T25, and selects the speed accordingly. > This speed is used to look up the correct table in the device tree Well if we really want to do this properly we should have a separate device tree file for the T20 Seaboard. Since the kernel has dropped T20 support, we should do the same. I have updated this patch. Regards, Simon > >> >> >> >> -Olof > > Regards, > Simon ^ permalink raw reply [flat|nested] 7+ messages in thread
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2012-04-02 23:18 ` [PATCH v3 02/23] fdt: Add function to return next compatible subnode Simon Glass
[not found] ` <1333408743-28720-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2012-04-02 23:18 ` [PATCH v3 01/23] fdt: Add function to locate an array in the device tree Simon Glass
2012-04-02 23:19 ` [PATCH v3 20/23] fdt: tegra: Add EMC node to " Simon Glass
2012-04-02 23:19 ` [PATCH v3 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard Simon Glass
2012-04-03 5:22 ` Olof Johansson
2012-04-04 0:47 ` Simon Glass
2012-04-05 21:58 ` Simon Glass
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