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[198.48.202.89]) by smtp.gmail.com with ESMTPSA id n64sm4167120qkd.79.2021.07.10.10.45.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 10 Jul 2021 10:45:43 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Sat, 10 Jul 2021 13:45:42 -0400 Message-Id: From: "Liam Beguin" To: "Peter Rosin" , , , Cc: , , , Subject: Re: [PATCH v4 05/10] iio: afe: rescale: add INT_PLUS_{MICRO,NANO} support References: <20210706160942.3181474-1-liambeguin@gmail.com> <20210706160942.3181474-6-liambeguin@gmail.com> <4be51a74-9913-291a-9dac-422ac23da3ea@axentia.se> <353ceae9-ad7a-3175-d764-a9e590d3e8d3@axentia.se> In-Reply-To: <353ceae9-ad7a-3175-d764-a9e590d3e8d3@axentia.se> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sat Jul 10, 2021 at 4:14 AM EDT, Peter Rosin wrote: > > > On 2021-07-09 21:30, Liam Beguin wrote: > > On Fri Jul 9, 2021 at 12:29 PM EDT, Peter Rosin wrote: > >> > >> > >> On 2021-07-06 18:09, Liam Beguin wrote: > >>> From: Liam Beguin > >>> > >>> Add IIO_VAL_INT_PLUS_{NANO,MICRO} scaling support. > >>> Scale the integer part and the decimal parts individually and keep th= e > >>> original scaling type. > >>> > >>> Signed-off-by: Liam Beguin > >>> --- > >>> drivers/iio/afe/iio-rescale.c | 8 ++++++++ > >>> 1 file changed, 8 insertions(+) > >>> > >>> diff --git a/drivers/iio/afe/iio-rescale.c b/drivers/iio/afe/iio-resc= ale.c > >>> index ba3bdcc69b16..1d0e24145d87 100644 > >>> --- a/drivers/iio/afe/iio-rescale.c > >>> +++ b/drivers/iio/afe/iio-rescale.c > >>> @@ -89,7 +89,15 @@ static int rescale_read_raw(struct iio_dev *indio_= dev, > >>> do_div(tmp, 1000000000LL); > >>> *val =3D tmp; > >>> return ret; > >>> + case IIO_VAL_INT_PLUS_NANO: > >>> + case IIO_VAL_INT_PLUS_MICRO: > >>> + tmp =3D (s64)*val * rescale->numerator; > >>> + *val =3D div_s64(tmp, rescale->denominator); > >>> + tmp =3D (s64)*val2 * rescale->numerator; > >>> + *val2 =3D div_s64(tmp, rescale->denominator); > >> > >=20 > > Hi Peter, > >=20 > >> Hi! > >> > >> You are losing precision, and you are not mormalising after the > >> calculation. > >=20 > > Can you elaborate a little on what you mean here? > >=20 > > Do you mean that I should make sure that *val2, the PLUS_{NANO,MICRO} > > part, doesn't contain an integer part? And if so transfer that part bac= k > > to *val? Hi Peter, > > Yes. On 32-bit, you will easily wrap, especially for PLUS_NANO. You'd > only need a scale factor of 10 or so and a fractional part above .5 to > hit the roof (10 * 500000000 > 2^32). > Right, That makes sense! > But I also mean that you are losing precision when you are scaling > the integer part and the fractional part separately. That deserves > at least a comment, but ideally it should be handled correctly. > Oh got it! Apologies, How did I miss that... All things considered, it might make sense to also implement the test case Jonathan mentioned [1]. I'll look into it. [1] https://lore.kernel.org/linux-devicetree/20210704173639.622371bf@jic23-= huawei/ > >> I think it's better to not even attempt this given that the results ca= n > >> be > >> really poor. > >=20 > > Unfortunatelly, I'm kinda stuck with this as some of my ADC use these > > types. > > Ok. Crap. :-) Can't agree more :-) Thanks, Liam > > Cheers, > Peter