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[31.151.115.246]) by smtp.gmail.com with ESMTPSA id 17-20020a170906211100b007a8de84ce36sm2676467ejt.206.2022.10.31.01.58.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 31 Oct 2022 01:58:00 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 31 Oct 2022 09:58:00 +0100 Message-Id: Cc: <~postmarketos/upstreaming@lists.sr.ht>, "AngeloGioacchino Del Regno" , "Konrad Dybcio" , "Martin Botka" , "Jami Kettunen" , "Andy Gross" , "Bjorn Andersson" , "Rob Herring" , "Krzysztof Kozlowski" , "Luca Weiss" , , , Subject: Re: [PATCH 10/10] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes From: "Luca Weiss" To: "Marijn Suijten" , X-Mailer: aerc 0.12.0 References: <20221030073232.22726-1-marijn.suijten@somainline.org> <20221030073232.22726-11-marijn.suijten@somainline.org> In-Reply-To: <20221030073232.22726-11-marijn.suijten@somainline.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sun Oct 30, 2022 at 8:32 AM CET, Marijn Suijten wrote: > When enabling the APPS SMMU the mainline driver reconfigures the SMMU > from its bootloader configuration, loosing the stream mapping for (among > which) the SDHCI hardware and breaking its ADMA feature. This feature > can be disabled with: > > sdhci.debug_quirks=3D0x40 > > But it is of course desired to have this feature enabled and working > through the SMMU. > > Signed-off-by: Marijn Suijten Reviewed-by: Luca Weiss Tested-by: Luca Weiss # sm7225-fairphone-fp4 Regards Luca > --- > arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/q= com/sm6350.dtsi > index b98b881ebe7e..c309a359ded9 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -485,6 +485,7 @@ sdhc_1: mmc@7c4000 { > interrupts =3D , > ; > interrupt-names =3D "hc_irq", "pwr_irq"; > + iommus =3D <&apps_smmu 0x60 0x0>; > =20 > clocks =3D <&gcc GCC_SDCC1_AHB_CLK>, > <&gcc GCC_SDCC1_APPS_CLK>, > @@ -1064,6 +1065,7 @@ sdhc_2: mmc@8804000 { > interrupts =3D , > ; > interrupt-names =3D "hc_irq", "pwr_irq"; > + iommus =3D <&apps_smmu 0x560 0x0>; > =20 > clocks =3D <&gcc GCC_SDCC2_AHB_CLK>, > <&gcc GCC_SDCC2_APPS_CLK>, > --=20 > 2.38.1