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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id j17-20020a50d011000000b004e48f8df7e2sm3400420edf.72.2023.03.07.06.54.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Mar 2023 06:54:01 -0800 (PST) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 07 Mar 2023 15:54:01 +0100 Message-Id: Subject: Re: [PATCH v3 1/2] clk: qcom: camcc-sm6350: add pm_runtime support From: "Luca Weiss" To: "Dmitry Baryshkov" Cc: "Andy Gross" , "Bjorn Andersson" , "Konrad Dybcio" , "Michael Turquette" , "Stephen Boyd" , "Rob Herring" , "Krzysztof Kozlowski" , <~postmarketos/upstreaming@lists.sr.ht>, , , , , X-Mailer: aerc 0.14.0 References: <20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com> <20230213-sm6350-camcc-runtime_pm-v3-1-d35e0d833cc4@fairphone.com> In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue Feb 14, 2023 at 1:32 PM CET, Dmitry Baryshkov wrote: > On Tue, 14 Feb 2023 at 13:01, Luca Weiss wrote= : > > > > Make sure that we can enable and disable the power domains used for > > camcc when the clocks are and aren't used. > > > > Signed-off-by: Luca Weiss > > --- > > drivers/clk/qcom/camcc-sm6350.c | 25 ++++++++++++++++++++++++- > > 1 file changed, 24 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-s= m6350.c > > index acba9f99d960..fc5532e2ee5b 100644 > > --- a/drivers/clk/qcom/camcc-sm6350.c > > +++ b/drivers/clk/qcom/camcc-sm6350.c > > @@ -7,6 +7,8 @@ > > #include > > #include > > #include > > +#include > > +#include > > #include > > > > #include > > @@ -1869,6 +1871,19 @@ MODULE_DEVICE_TABLE(of, camcc_sm6350_match_table= ); > > static int camcc_sm6350_probe(struct platform_device *pdev) > > { > > struct regmap *regmap; > > + int ret; > > + > > + ret =3D devm_pm_runtime_enable(&pdev->dev); > > + if (ret < 0) > > + return ret; > > + > > + ret =3D devm_pm_clk_create(&pdev->dev); > > + if (ret < 0) > > + return ret; > > This makes me wonder, what is the use for the pm_clk in your case? The > driver doesn't seem to use of_pm_clk_add_clk(), of_pm_clk_add_clks() > or pm_clk_add_clk(). So pm_clk_suspend() and pm_clk_resume() do > nothing. You're right that we're not using any of these functions in the driver. However still when camcc is not used, the associated power domain turns off correctly so that part works as expected. Honestly these lines have been copied from a different driver and I'm not familiar enough with the pm_runtime APIs to know what to use here without using the pm_clk* and pm_clk_suspend. Basically we need, if any clock is being used in the driver, the power-domain needs to be enabled as well, and if nothing is used the power-domain can be disabled again. Please advise. Regards Luca > > > + > > + ret =3D pm_runtime_get(&pdev->dev); > > + if (ret) > > + return ret; > > > > regmap =3D qcom_cc_map(pdev, &camcc_sm6350_desc); > > if (IS_ERR(regmap)) > > @@ -1879,14 +1894,22 @@ static int camcc_sm6350_probe(struct platform_d= evice *pdev) > > clk_agera_pll_configure(&camcc_pll2, regmap, &camcc_pll2_config= ); > > clk_fabia_pll_configure(&camcc_pll3, regmap, &camcc_pll3_config= ); > > > > - return qcom_cc_really_probe(pdev, &camcc_sm6350_desc, regmap); > > + ret =3D qcom_cc_really_probe(pdev, &camcc_sm6350_desc, regmap); > > + pm_runtime_put(&pdev->dev); > > + > > + return ret; > > } > > > > +static const struct dev_pm_ops camcc_pm_ops =3D { > > + SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL) > > +}; > > + > > static struct platform_driver camcc_sm6350_driver =3D { > > .probe =3D camcc_sm6350_probe, > > .driver =3D { > > .name =3D "sm6350-camcc", > > .of_match_table =3D camcc_sm6350_match_table, > > + .pm =3D &camcc_pm_ops, > > }, > > }; > > > > > > -- > > 2.39.1 > > > > > --=20 > With best wishes > Dmitry