Re: [PATCH 2/5] arm64: dts: qcom: sm6350: Add GPUCC node

["Luca Weiss" <luca.weiss@fairphone.com>]

On Thu Mar 16, 2023 at 12:16 PM CET, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@somainline.org>
>
> Add and configure a node for the GPU clock controller.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>

> ---
>  arch/arm64/boot/dts/qcom/sm6350.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> index c46bb6dab6a1..523c7edfa4b3 100644
> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> @@ -5,6 +5,7 @@
>   */
>  
>  #include <dt-bindings/clock/qcom,gcc-sm6350.h>
> +#include <dt-bindings/clock/qcom,gpucc-sm6350.h>
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/clock/qcom,sm6350-camcc.h>
>  #include <dt-bindings/dma/qcom-gpi.h>
> @@ -1125,6 +1126,20 @@ compute-cb@5 {
>  			};
>  		};
>  
> +		gpucc: clock-controller@3d90000 {
> +			compatible = "qcom,sm6350-gpucc";
> +			reg = <0 0x03d90000 0 0x9000>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <&gcc GCC_GPU_GPLL0_CLK>,
> +				 <&gcc GCC_GPU_GPLL0_DIV_CLK>;
> +			clock-names = "bi_tcxo",
> +				      "gcc_gpu_gpll0_clk",
> +				      "gcc_gpu_gpll0_div_clk";
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			#power-domain-cells = <1>;
> +		};
> +
>  		mpss: remoteproc@4080000 {
>  			compatible = "qcom,sm6350-mpss-pas";
>  			reg = <0x0 0x04080000 0x0 0x4040>;
>
> -- 
> 2.39.2