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smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=V4gbX4vD; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="V4gbX4vD" Received: by mail.gandi.net (Postfix) with ESMTPSA id BF63644428; Fri, 14 Feb 2025 13:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1739539241; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rOCi9rhcANoHWr2ZMX7vTB+ne39Ad/Gv+eLqaTBAmak=; b=V4gbX4vD59+0iFSy3lk0mjAWfXowsqy/5PmB67YkkNUjabN9S0wutbebsfbMQtCwGDjivi mY6JHqKCtfV5EcewFobpb2PZzrG484q3aA5oHQyZNQF0NB/s5+fELSSkW3/MBxKe2R0d0W BJHca2LVlOsILgju/B+aGG9j3OWGRUr7sPOzKY7pTW3mzdh42gsj7OORL+pqCj3/yZAWqX dpgNTj+Ju0cRCuGi9e/NMIvLqMDP+spMOagq2vmmR+ytr7xFo0yXBW/yxWMXZHrvPKNpxm BH/qkSpbsEWfuPZfLq6sHd1USFPT3Wr0Sv9vMNKSM6y1LIYahm7tKoa/8D3fLg== Content-Type: text/plain; charset=UTF-8 Date: Fri, 14 Feb 2025 14:20:39 +0100 Message-Id: Cc: "Magnus Damm" , "Rob Herring" , "Krzysztof Kozlowski" , "Thomas Petazzoni" , "Herve Codina" , "Milan Stevanovic" , "Jimmy Lalande" , "Pascal Eberhard" , , , , "Gareth Williams" , "Wolfram Sang" Subject: Re: [PATCH v2 2/2] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree From: "Thomas Bonnefille" To: "Miquel Raynal" , "Geert Uytterhoeven" , "Romain Gantois" Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: aerc 0.20.1-0-g2ecb8770224a References: <20230209133507.150571-1-clement.leger@bootlin.com> <20230209133507.150571-3-clement.leger@bootlin.com> <20230215092933.2f71ece0@fixe.home> <20230215115441.361aed53@fixe.home> <87mshsvqjk.fsf@bootlin.com> In-Reply-To: <87mshsvqjk.fsf@bootlin.com> X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdegleejiecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurheptgffkfevuffhvfgggffofhgjsehtqhertdertdejnecuhfhrohhmpedfvfhhohhmrghsuceuohhnnhgvfhhilhhlvgdfuceothhhohhmrghsrdgsohhnnhgvfhhilhhlvgessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepkeelfeefhfdtveehjedthefhtefggfdtheduieekiefhjeevheffhfelteefuddtnecuffhomhgrihhnpegsohhothhlihhnrdgtohhmnecukfhppeeltddrkeelrdduieefrdduvdejnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehinhgvthepledtrdekledrudeifedruddvjedphhgvlhhopehlohgtrghlhhhoshhtpdhmrghilhhfrhhomhepthhhohhmrghsrdgsohhnnhgvfhhilhhlvgessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepudeipdhrtghpthhtohepmhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomhdprhgtphhtthhopehgvggvrhhtsehlihhnuhigqdhmieekkhdrohhrghdprhgtphhtthhopehrohhmrghinhdrghgrnhhtohhishessghoohhtlhhinhdrtghomhdprhgtphhtthhopehmrghgnhhushdruggrmhhmsehgm hgrihhlrdgtohhmpdhrtghpthhtoheprhhosghhodgutheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepkhhriiihshiithhofhdrkhhoiihlohifshhkihdoughtsehlihhnrghrohdrohhrghdprhgtphhtthhopehthhhomhgrshdrphgvthgriiiiohhnihessghoohhtlhhinhdrtghomhdprhgtphhtthhopehhvghrvhgvrdgtohguihhnrgessghoohhtlhhinhdrtghomh X-GND-Sasl: thomas.bonnefille@bootlin.com Hello Geert, I've started working on this issue, however I have one problem : >> Hi Cl=C3=A9ment, >> >> On Wed, Feb 15, 2023 at 12:31=E2=80=AFPM Geert Uytterhoeven >> wrote: >>> On Wed, Feb 15, 2023 at 11:52 AM Cl=C3=A9ment L=C3=A9ger >>> wrote: >>> > Le Wed, 15 Feb 2023 09:29:33 +0100, >>> > Cl=C3=A9ment L=C3=A9ger a =C3=A9crit : >>> > > Le Tue, 14 Feb 2023 17:25:14 +0100, >>> > > Geert Uytterhoeven a =C3=A9crit : >>> > > > On Thu, Feb 9, 2023 at 2:32 PM Cl=C3=A9ment L=C3=A9ger wrote: >>> > > > > The EB board (Expansion board) supports both RZ/N1D and RZ-N1S.= Since this >>> > > > > configuration targets only the RZ/N1D, it is named r9a06g032-rz= n1d400-eb. >>> > > > > It adds support for the 2 additional switch ports (port C and D= ) that are >>> > > > > available on that board. >>> > > > > >>> > > > > Signed-off-by: Cl=C3=A9ment L=C3=A9ger >>> > > > >>> > > > Thanks for your patch! >>> > > > >>> > > > > --- /dev/null >>> > > > > +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-eb.dts >>> >>> > > > > + pinctrl-0 =3D <&pins_eth1>, <&pins_eth2>, <&pins_eth3>,= <&pins_eth4>, >>> > > > > + <&pins_mdio1>; >>> > > > > + >>> > > > > + mdio { >>> > > > > + /* CN15 and CN16 switches must be configured in= MDIO2 mode */ >>> > > > > + switch0phy1: ethernet-phy@1 { >>> > > > > + reg =3D <1>; >>> > > > > + marvell,reg-init =3D <3 16 0 0x1010>; >>> > > > >>> > > > marvell,reg-init is not documented in any DT bindings document? >>> > > >>> > > Indeed, this is not somethiong that should be made available here. = It's >>> > > only inverting the LED polarity but supported by some internal patc= h. >>> > > I'll remove that. >>> >>> > I actually was confused by a property I added in another device-tree = but >>> > marvell,reg-init exists, is handled by the marvell phy driver and use= d >>> > in a few device-trees. Strangely, it is not documented anywhere. So I >>> > can either remove that (and the LED won't work properly) or let it li= ve >>> > depending on what you prefer. >>> >>> In that case, please keep it. >>> But the property really should be documented, one day... As Cl=C3=A9ment mentioned, this property is used to set up the LEDs for Marvell PHY. However, Marvell's PHYs have no dedicated bindings; only their associated switches do. PHY's usually don't have their own yaml, so there is no easy place where to add this property. We could however describe them in the numerous switch bindings that embed a Marvell PHY, which are: Qualcomm ETHQOS, Cadence MACB/GEM, Gianfar, Freescale FEC, Renesas switches and of course Marvell switches. I already thought of doing it in the binding of the renesas switch, like this : Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml: ``` \[...\] mdio: $ref: /schemas/net/mdio.yaml# patternProperties: '@\[0-9a-f\]+$': properties: marvel,reg-init: - description: Lorem Ipsum unevaluatedProperties: false \[...\] ``` but it would document it only for this particular switch.=20 It is also possible to do it in the main mdio.yaml on the model of this: https://elixir.bootlin.com/linux/v6.13.1/source/Documentation/devicetree/bi= ndings/spi/spi-peripheral-props.yaml#L121 What's your opinion on this ? Moreover, everywhere this property is used in the kernel, it is to set up the LEDs. Nowadays, the Marvell PHY driver should be able to handle LEDs without this property. Therefore, this property should be deprecated in this case. Regards, Thomas