[PATCH 0/2] Imagination BXS-4-64 MC1 GPU support (DTS changes)

[PATCH 0/2] Imagination BXS-4-64 MC1 GPU support (DTS changes)

[Matt Coster]

Now that the binding and driver changes to support the Imagination
BXS-4-64 [1] have landed in a DRM tree, here are the corresponding DTS
changes without the [DO NOT MERGE] tag.

This GPU is found in the TI AM68 family of SoCs, with initial support
added to the k3-j721s2 devicetree and tested on a TI SK-AM68 board.

[1]: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-0-eda620c5865f@imgtec.com

---
Matt Coster (2):
      arm64: dts: ti: k3-am62: New GPU binding details
      arm64: dts: ti: k3-j721s2: Add GPU node

 arch/arm64/boot/dts/ti/k3-am62-main.dtsi   |  4 +++-
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++
 2 files changed, 15 insertions(+), 1 deletion(-)
---
base-commit: 81f6e0e0f3505809dd78eab129106f1c0cf2baf1
change-id: 20250415-bxs-4-64-dts-c984d0876556

[PATCH 1/2] arm64: dts: ti: k3-am62: New GPU binding details

[Matt Coster]

Use the new compatible string and power domain name as introduced in
commit 2c01d9099859 ("dt-bindings: gpu: img: Future-proofing
enhancements")[1].

[1]: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-1-eda620c5865f@imgtec.com

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
---
This patch was previously sent as [DO NOT MERGE]:
https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-17-eda620c5865f@imgtec.com
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 7d355aa73ea2116723735f70b9351cefcd8bc118..d17b25cae196b08d24adbe7c913ccaba7eed37eb 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -691,12 +691,14 @@ ospi0: spi@fc40000 {
 	};
 
 	gpu: gpu@fd00000 {
-		compatible = "ti,am62-gpu", "img,img-axe";
+		compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe",
+			     "img,img-rogue";
 		reg = <0x00 0x0fd00000 0x00 0x20000>;
 		clocks = <&k3_clks 187 0>;
 		clock-names = "core";
 		interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 		power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a";
 	};
 
 	cpsw3g: ethernet@8000000 {

-- 
2.49.0

[PATCH 2/2] arm64: dts: ti: k3-j721s2: Add GPU node

[Matt Coster]

The J721S2 binding is based on the TI downstream binding in commit
54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
but with updated compatible strings.

The clock[2] and power[3] indices were verified from docs, but the
source of the interrupt index remains elusive.

[1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
[2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
[3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
---
This patch was previously sent as [DO NOT MERGE]:
https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com
---
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..a79ac41b2c1f51b7193e6133864428bd35a5e835 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -2048,4 +2048,16 @@ watchdog8: watchdog@23f0000 {
 		/* reserved for MAIN_R5F1_1 */
 		status = "reserved";
 	};
+
+	gpu: gpu@4e20000000 {
+		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
+		reg = <0x4e 0x20000000 0x00 0x80000>;
+		clocks = <&k3_clks 130 1>;
+		clock-names = "core";
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
+				<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a", "b";
+		dma-coherent;
+	};
 };

-- 
2.49.0

Re: [PATCH 2/2] arm64: dts: ti: k3-j721s2: Add GPU node

[Randolph Sapp]

On Tue Apr 15, 2025 at 11:20 AM CDT, Matt Coster wrote:
> The J721S2 binding is based on the TI downstream binding in commit
> 54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
> but with updated compatible strings.
>
> The clock[2] and power[3] indices were verified from docs, but the
> source of the interrupt index remains elusive.
>

For future reference, interrupt maps are present in the TRM. "Table 6-89. GPU0
Hardware Requests" explicitly calls it out "GPU0 | GPU0_MISC_0_IRQ_0 |
GIC500_SPI_IN_56 | COMPUTE_CLUSTER0 | GPU0 interrupt request". Subtract 32 from
that pin number to get the DT number.

That comment aside, this series seems fine to me.
Reviewed-by: Randolph Sapp <rs@ti.com>

> [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
> [2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
> [3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html
>
> Signed-off-by: Matt Coster <matt.coster@imgtec.com>
> ---
> This patch was previously sent as [DO NOT MERGE]:
> https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com
> ---
>  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..a79ac41b2c1f51b7193e6133864428bd35a5e835 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -2048,4 +2048,16 @@ watchdog8: watchdog@23f0000 {
>  		/* reserved for MAIN_R5F1_1 */
>  		status = "reserved";
>  	};
> +
> +	gpu: gpu@4e20000000 {
> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
> +		reg = <0x4e 0x20000000 0x00 0x80000>;
> +		clocks = <&k3_clks 130 1>;
> +		clock-names = "core";
> +		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> +		power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
> +				<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
> +		power-domain-names = "a", "b";
> +		dma-coherent;
> +	};
>  };

Re: [PATCH 2/2] arm64: dts: ti: k3-j721s2: Add GPU node

[Nishanth Menon]

On 15:29-20250415, Randolph Sapp wrote:
> On Tue Apr 15, 2025 at 11:20 AM CDT, Matt Coster wrote:
> > The J721S2 binding is based on the TI downstream binding in commit
> > 54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
> > but with updated compatible strings.
> >
> > The clock[2] and power[3] indices were verified from docs, but the
> > source of the interrupt index remains elusive.
> >
> 
> For future reference, interrupt maps are present in the TRM. "Table 6-89. GPU0
> Hardware Requests" explicitly calls it out "GPU0 | GPU0_MISC_0_IRQ_0 |
> GIC500_SPI_IN_56 | COMPUTE_CLUSTER0 | GPU0 interrupt request". Subtract 32 from
> that pin number to get the DT number.

Now that the mystery is resolved, could we update the commit message?
> 
> That comment aside, this series seems fine to me.
> Reviewed-by: Randolph Sapp <rs@ti.com>
> 
> > [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
> > [2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
> > [3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html
> >
> > Signed-off-by: Matt Coster <matt.coster@imgtec.com>
> > ---
> > This patch was previously sent as [DO NOT MERGE]:
> > https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com
> > ---
> >  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..a79ac41b2c1f51b7193e6133864428bd35a5e835 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > @@ -2048,4 +2048,16 @@ watchdog8: watchdog@23f0000 {
> >  		/* reserved for MAIN_R5F1_1 */
> >  		status = "reserved";
> >  	};
> > +
> > +	gpu: gpu@4e20000000 {
> > +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
> > +		reg = <0x4e 0x20000000 0x00 0x80000>;
> > +		clocks = <&k3_clks 130 1>;
> > +		clock-names = "core";
> > +		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> > +		power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
> > +				<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
> > +		power-domain-names = "a", "b";
> > +		dma-coherent;
> > +	};
> >  };
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Re: [PATCH 2/2] arm64: dts: ti: k3-j721s2: Add GPU node

[Matt Coster]

[-- Attachment #1.1: Type: text/plain, Size: 2879 bytes --]

On 16/04/2025 12:27, Nishanth Menon wrote:
> On 15:29-20250415, Randolph Sapp wrote:
>> On Tue Apr 15, 2025 at 11:20 AM CDT, Matt Coster wrote:
>>> The J721S2 binding is based on the TI downstream binding in commit
>>> 54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
>>> but with updated compatible strings.
>>>
>>> The clock[2] and power[3] indices were verified from docs, but the
>>> source of the interrupt index remains elusive.
>>>
>>
>> For future reference, interrupt maps are present in the TRM. "Table 6-89. GPU0
>> Hardware Requests" explicitly calls it out "GPU0 | GPU0_MISC_0_IRQ_0 |
>> GIC500_SPI_IN_56 | COMPUTE_CLUSTER0 | GPU0 interrupt request". Subtract 32 from
>> that pin number to get the DT number.
> 
> Now that the mystery is resolved, could we update the commit message?

Absolutely, I'll send a V2 shortly.

Cheers,
Matt

>>
>> That comment aside, this series seems fine to me.
>> Reviewed-by: Randolph Sapp <rs@ti.com>
>>
>>> [1]: https://urldefense.com/v3/__https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel__;!!KCwjcDI!y39eGiVNIkSgKr9rKR3oO-7kzxHNUBmRKuqRffQd1_TPpuYEAuBgmkmvSADjBNAs1XS9DDo$ 
>>> [2]: https://urldefense.com/v3/__https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html__;!!KCwjcDI!y39eGiVNIkSgKr9rKR3oO-7kzxHNUBmRKuqRffQd1_TPpuYEAuBgmkmvSADjBNAsb0N9gDQ$ 
>>> [3]: https://urldefense.com/v3/__https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html__;!!KCwjcDI!y39eGiVNIkSgKr9rKR3oO-7kzxHNUBmRKuqRffQd1_TPpuYEAuBgmkmvSADjBNAsQJ1GE04$ 
>>>
>>> Signed-off-by: Matt Coster <matt.coster@imgtec.com>
>>> ---
>>> This patch was previously sent as [DO NOT MERGE]:
>>> https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com 
>>> ---
>>>  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>>> index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..a79ac41b2c1f51b7193e6133864428bd35a5e835 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>>> @@ -2048,4 +2048,16 @@ watchdog8: watchdog@23f0000 {
>>>  		/* reserved for MAIN_R5F1_1 */
>>>  		status = "reserved";
>>>  	};
>>> +
>>> +	gpu: gpu@4e20000000 {
>>> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
>>> +		reg = <0x4e 0x20000000 0x00 0x80000>;
>>> +		clocks = <&k3_clks 130 1>;
>>> +		clock-names = "core";
>>> +		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
>>> +		power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
>>> +				<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
>>> +		power-domain-names = "a", "b";
>>> +		dma-coherent;
>>> +	};
>>>  };
>>
> 


-- 
Matt Coster
E: matt.coster@imgtec.com

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