Re: [PATCH v3 08/12] arm64: dts: qcom: sm4250: add description of soundwire and dmic pins

["Alexey Klimov" <alexey.klimov@linaro.org>]

On Thu May 22, 2025 at 7:12 PM BST, Konrad Dybcio wrote:
> On 5/22/25 7:40 PM, Alexey Klimov wrote:
>> Adds data and clock pins description (their active state) of
>> soundwire masters and onboard DMIC.
>> 
>> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>> ---
>>  arch/arm64/boot/dts/qcom/sm4250.dtsi | 62 ++++++++++++++++++++++++++++++++++++
>>  1 file changed, 62 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi
>> index cd8c8e59976e5dc4b48d0e14566cf142895711d5..723391ba9aa21d84ba2dda23932c20bd048fbe80 100644
>> --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi
>> @@ -37,10 +37,36 @@ &cpu7 {
>>  	compatible = "qcom,kryo240";
>>  };
>>  
>> +&swr0 {
>> +	pinctrl-0 = <&lpass_tx_swr_active>;
>> +	pinctrl-names = "default";
>> +};
>> +
>> +&swr1 {
>> +	pinctrl-0 = <&lpass_rx_swr_active>;
>> +	pinctrl-names = "default";
>> +};
>> +
>>  &lpass_tlmm {
>>  	compatible = "qcom,sm4250-lpass-lpi-pinctrl";
>>  	gpio-ranges = <&lpass_tlmm 0 0 27>;
>>  
>> +	lpass_dmic01_active: lpass-dmic01-active-state {
>> +		clk-pins {
>> +			pins = "gpio6";
>> +			function = "dmic01_clk";
>> +			drive-strength = <8>;
>> +			output-high;
>> +		};
>> +
>> +		data-pins {
>> +			pins = "gpio7";
>> +			function = "dmic01_data";
>> +			drive-strength = <8>;
>> +			input-enable;
>> +		};
>
> Other SoCs put these in the common dtsi

which seems to be sm4250.dtsi in this case unless I am missing something.

Thanks,
Alexey