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Thu, 08 Jan 2026 11:04:52 -0800 (PST) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Type: multipart/signed; boundary=7947329d98261ade7d2d40f049ba218cf4626c3400a81e7292b42acefe9d; micalg=pgp-sha512; protocol="application/pgp-signature" Date: Thu, 08 Jan 2026 20:04:44 +0100 Message-Id: Cc: "Vishal Mahaveer" , "Kevin Hilman" , "Dhruva Gole" , "Sebin Francis" , "Kendall Willis" , "Akashdeep Kaur" , , , Subject: Re: [PATCH] arm64: dts: ti: k3-am62a7-sk: Disable mmc Schmitt Trigger From: "Markus Schneider-Pargmann" To: "Alexander Sverdlin" , "Markus Schneider-Pargmann (TI.com)" , "Nishanth Menon" , "Vignesh Raghavendra" , "Tero Kristo" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" X-Mailer: aerc 0.21.0 References: <20260106-topic-am62a-mmc-pinctrl-v6-19-next-v1-1-1190ac29aadb@baylibre.com> <979eb1054dbe116c2c8bb9920e94e3a93db5346c.camel@gmail.com> <5e116c9089bfa8d645eb044090a75523758c6743.camel@gmail.com> In-Reply-To: <5e116c9089bfa8d645eb044090a75523758c6743.camel@gmail.com> --7947329d98261ade7d2d40f049ba218cf4626c3400a81e7292b42acefe9d Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Hi Alexander, On Wed Jan 7, 2026 at 3:49 PM CET, Alexander Sverdlin wrote: > Hi Markus, > > On Tue, 2026-01-06 at 18:25 +0100, Alexander Sverdlin wrote: >> > =C2=A0 main_mmc1_pins_default: main-mmc1-default-pins { >> > =C2=A0 pinctrl-single,pins =3D < >> > - AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ > > this is a bit trial-and-error, but maybe you could try to add missing clo= ck > retimer/loopback pin for test instead of disabling ST? Would this help: > > AM62AX_IOPAD(0x238, PIN_INPUT, 0) /* (N/A) MMC1_CLKLB */ > > some SoCs from AM6x family seem to require it even though TRMs claim the = default > PoR state is the proper one. Thanks, but adding that does not help unfortunately. And it seems ST being enabled on that pin does not break it either. The data lines seem to be the important ones. Best Markus > >> > - AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ >> > - AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ >> > - AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ >> > - AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ >> > - AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ >> > - AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ >>=20 >> All of these have ST enabled on PoR, according to TRM. >>=20 >> > + AM62AX_IOPAD(0x23c, PIN_INPUT_NOST, 0) /* (A21) MMC1_CMD */ >> > + AM62AX_IOPAD(0x234, PIN_INPUT_NOST, 0) /* (B22) MMC1_CLK */ >> > + AM62AX_IOPAD(0x230, PIN_INPUT_NOST, 0) /* (A22) MMC1_DAT0 */ >> > + AM62AX_IOPAD(0x22c, PIN_INPUT_NOST, 0) /* (B21) MMC1_DAT1 */ >> > + AM62AX_IOPAD(0x228, PIN_INPUT_NOST, 0) /* (C21) MMC1_DAT2 */ >> > + AM62AX_IOPAD(0x224, PIN_INPUT_NOST, 0) /* (D22) MMC1_DAT3 */ >> > + AM62AX_IOPAD(0x240, PIN_INPUT_NOST, 0) /* (D17) MMC1_SDCD */ >> > =C2=A0 >; >> > =C2=A0 bootph-all; >> > =C2=A0 }; --7947329d98261ade7d2d40f049ba218cf4626c3400a81e7292b42acefe9d Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iKMEABYKAEsWIQSJYVVm/x+5xmOiprOFwVZpkBVKUwUCaV//zRsUgAAAAAAEAA5t YW51MiwyLjUrMS4xMSwyLDIRHG1zcEBiYXlsaWJyZS5jb20ACgkQhcFWaZAVSlOF nQD/cu21gm/lNOgHb5baZ1th/s8xiWa8aurswOgo90T3OqYA/1en3p+Vn6oSouYA dhhamdGyjVdH1yAP6BGMwtwcfBED =WALh -----END PGP SIGNATURE----- --7947329d98261ade7d2d40f049ba218cf4626c3400a81e7292b42acefe9d--