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From: "Luca Weiss" <luca.weiss@fairphone.com>
To: "Dmitry Baryshkov" <dmitry.baryshkov@oss.qualcomm.com>,
	"Luca Weiss" <luca.weiss@fairphone.com>
Cc: "Bjorn Andersson" <andersson@kernel.org>,
	"Linus Walleij" <linusw@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	<~postmarketos/upstreaming@lists.sr.ht>,
	<phone-devel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/5] arm64: dts: qcom: sm6350: add LPASS LPI pin controller
Date: Thu, 29 Jan 2026 09:32:49 +0100	[thread overview]
Message-ID: <DG0XMT4TZKCH.HPXGS9YTG9FA@fairphone.com> (raw)
In-Reply-To: <d3upp33rbn66ioxpc65n7uqwz32kxghzue2n3dkd5k4lch3iwg@qgcppndlte5a>

On Wed Jan 28, 2026 at 11:16 PM CET, Dmitry Baryshkov wrote:
> On Wed, Jan 28, 2026 at 01:26:52PM +0100, Luca Weiss wrote:
>> Add LPASS LPI pinctrl node required for audio functionality on SM6350.
>> 
>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>> ---
>>  arch/arm64/boot/dts/qcom/sm6350.dtsi | 66 ++++++++++++++++++++++++++++++++++++
>>  1 file changed, 66 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
>> index 9f9b9f9af0da..b1fb6c812da7 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
>> @@ -1448,6 +1448,72 @@ compute-cb@5 {
>>  			};
>>  		};
>>  
>> +		lpass_tlmm: pinctrl@33c0000 {
>> +			compatible = "qcom,sm6350-lpass-lpi-pinctrl";
>> +			reg = <0x0 0x033c0000 0x0 0x20000>,
>> +			      <0x0 0x03550000 0x0 0x10000>;
>> +			gpio-controller;
>> +			#gpio-cells = <2>;
>> +			gpio-ranges = <&lpass_tlmm 0 0 15>;
>> +
>> +			clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> +				 <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
>> +			clock-names = "core",
>> +				      "audio";
>> +
>> +			i2s1_active: i2s1-active-state {
>> +				clk-pins {
>> +					pins = "gpio6";
>> +					function = "i2s1_clk";
>> +					drive-strength = <8>;
>> +					bias-disable;
>> +					output-high;
>
> This looks suspicious for the clock pin.
>
>> +				};
>> +
>> +				ws-pins {
>> +					pins = "gpio7";
>> +					function = "i2s1_ws";
>> +					drive-strength = <8>;
>> +					bias-disable;
>> +					output-high;
>
> The same
>
>> +				};
>> +
>> +				data-pins {
>> +					pins = "gpio8", "gpio9";
>> +					function = "i2s1_data";
>> +					drive-strength = <8>;
>> +					bias-disable;
>> +					output-high;
>
> And here.

I've taken this pinctrl from downstream lagoon-lpi.dtsi. There the
active config for these pins have "output-high;" set.

And fwiw this pinctrl works fine at runtime for driving the speaker.

Regards
Luca

>
>> +				};
>> +			};
>> +
>> +			i2s1_sleep: i2s1-sleep-state {
>> +				clk-pins {
>> +					pins = "gpio6";
>> +					function = "i2s1_clk";
>> +					drive-strength = <2>;
>> +					bias-pull-down;
>> +					input-enable;
>> +				};
>> +
>> +				ws-pins {
>> +					pins = "gpio7";
>> +					function = "i2s1_ws";
>> +					drive-strength = <2>;
>> +					bias-pull-down;
>> +					input-enable;
>> +				};
>> +
>> +				data-pins {
>> +					pins = "gpio8", "gpio9";
>> +					function = "i2s1_data";
>> +					drive-strength = <2>;
>> +					bias-pull-down;
>> +					input-enable;
>> +				};
>> +			};
>> +		};
>> +
>>  		gpu: gpu@3d00000 {
>>  			compatible = "qcom,adreno-619.0", "qcom,adreno";
>>  			reg = <0x0 0x03d00000 0x0 0x40000>,
>> 
>> -- 
>> 2.52.0
>> 


  reply	other threads:[~2026-01-29  8:32 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-28 12:26 [PATCH 0/5] Add LPASS LPI pin controller support for SM6350 Luca Weiss
2026-01-28 12:26 ` [PATCH 1/5] dt-bindings: pinctrl: qcom: Add SM6350 LPI pinctrl Luca Weiss
2026-01-28 13:38   ` Rob Herring (Arm)
2026-01-28 14:53     ` Luca Weiss
2026-01-28 12:26 ` [PATCH 2/5] pinctrl: qcom: lpass-lpi: Add ability to use SPARE_1 for slew control Luca Weiss
2026-01-28 12:35   ` Konrad Dybcio
2026-01-28 12:26 ` [PATCH 3/5] pinctrl: qcom: Add SM6350 LPASS LPI TLMM Luca Weiss
2026-01-28 12:39   ` Konrad Dybcio
2026-01-28 22:03     ` Dmitry Baryshkov
2026-01-28 12:26 ` [PATCH 4/5] arm64: dts: qcom: sm6350: add LPASS LPI pin controller Luca Weiss
2026-01-28 22:16   ` Dmitry Baryshkov
2026-01-29  8:32     ` Luca Weiss [this message]
2026-01-29 11:19       ` Konrad Dybcio
2026-04-13  8:55         ` Luca Weiss
2026-01-28 12:26 ` [PATCH 5/5] arm64: defconfig: Enable LPASS LPI pin controller for SM6350 Luca Weiss
2026-01-28 22:17   ` Dmitry Baryshkov

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