From: "Luca Ceresoli" <luca.ceresoli@bootlin.com>
To: "Marek Vasut" <marek.vasut@mailbox.org>,
"Maxime Ripard" <mripard@kernel.org>
Cc: <dri-devel@lists.freedesktop.org>,
"Joseph Guo" <qijian.guo@nxp.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"David Airlie" <airlied@gmail.com>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Rob Herring" <robh@kernel.org>, "Robert Foss" <rfoss@kernel.org>,
"Simona Vetter" <simona@ffwll.ch>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v2 2/2] drm/bridge: waveshare-dsi: Add support for 1..4 DSI data lanes
Date: Tue, 03 Mar 2026 14:32:02 +0100 [thread overview]
Message-ID: <DGT6NVXAVDOH.1RAMJDTU22I4O@bootlin.com> (raw)
In-Reply-To: <13afd1fc-7201-4210-a697-8977d47857e7@mailbox.org>
Hi Marek,
On Tue Mar 3, 2026 at 1:59 PM CET, Marek Vasut wrote:
> On 3/3/26 8:56 AM, Maxime Ripard wrote:
>> On Mon, Mar 02, 2026 at 10:35:31PM +0100, Marek Vasut wrote:
>>> On 2/6/26 12:48 PM, Marek Vasut wrote:
>>>> On 1/15/26 3:39 AM, Marek Vasut wrote:
>>>>> Parse the data lane count out of DT. Limit the supported data lanes
>>>>> to 1..4 which is the maximum available DSI pairs on the connector of
>>>>> any known panels which may use this bridge. Internally, this bridge
>>>>> is an ChipOne ICN6211 which loads its register configuration from a
>>>>> dedicated storage and its I2C does not seem to be accessible. The
>>>>> ICN6211 also supports up to 4 DSI lanes, so this is a hard limit.
>>>>>
>>>>> To avoid any breakage on old DTs where the parsing of data lanes from
>>>>> DT may fail, fall back to the original hard-coded value of 2 lanes and
>>>>> warn user.
>>>>>
>>>>> The lane configuration is preconfigured in the bridge for each of the
>>>>> WaveShare panels. The 13.3" DSI panel works with 4-lane configuration,
>>>>> others seem to use 2-lane configuration. This is a hardware property,
>>>>> so the actual count should come from DT.
>>>>>
>>>>> Reviewed-by: Joseph Guo <qijian.guo@nxp.com>
>>>>> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
>>>>
>>>> Is it OK to apply these two patches now ?
>>>
>>> Can this be applied now ?
>>
>> It looks like you have a reviewed-by already, what's stoping you from
>> applying it yourself?
> I generally try to avoid applying my own patches, but if that is OK
> here, I will apply them ?
I fid it a bit weird as well, but it's the common practice in drm-misc, so
I do it when there are enough R-by / A-by.
One thing I'm never sure about is the definition of "enough R-by / A-by"
though. I used to kind of assume at least a maintainer listed in
MAINTAINERS should approve the patch. But that also seems not a rule for
drm-misc, at least for patches that impact only a specific driver and not
core or otherwise shared code, and/or which look "obviously correct".
Based on the above, I'm applying this series right now.
Luca
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2026-03-03 13:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-15 2:39 [PATCH v2 1/2] dt-bindings: display: bridge: waveshare,dsi2dpi: Document 1..4 DSI lane support Marek Vasut
2026-01-15 2:39 ` [PATCH v2 2/2] drm/bridge: waveshare-dsi: Add support for 1..4 DSI data lanes Marek Vasut
2026-02-06 11:48 ` Marek Vasut
2026-03-02 21:35 ` Marek Vasut
2026-03-03 7:56 ` Maxime Ripard
2026-03-03 12:59 ` Marek Vasut
2026-03-03 13:32 ` Luca Ceresoli [this message]
2026-03-03 14:15 ` Marek Vasut
2026-03-03 13:24 ` Luca Ceresoli
2026-01-15 20:01 ` [PATCH v2 1/2] dt-bindings: display: bridge: waveshare,dsi2dpi: Document 1..4 DSI lane support Rob Herring (Arm)
2026-03-03 13:42 ` Luca Ceresoli
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