Hi Vignesh, On Fri Apr 10, 2026 at 6:30 AM CEST, Vignesh Raghavendra wrote: > Hi Markus > > On 18/03/26 20:43, Markus Schneider-Pargmann (TI) wrote: >> Split the firmware memory region in more specific parts so it is better >> described where to find which information. Specifically the LPM metadata >> region is important as bootloader software like U-Boot has to know where >> that data is to be able to read that data. >> >> Signed-off-by: Markus Schneider-Pargmann (TI) >> --- >> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 40 +++++++++++++++++++++++++++++++-- >> 1 file changed, 38 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >> index e99bdbc2e0cbdf858f1631096f9c2a086191bab3..c381cc33064ec427751a9ac5bcdff745a9559a89 100644 >> --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >> @@ -59,9 +59,33 @@ wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { >> no-map; >> }; >> >> - wkup_r5fss0_core0_memory_region: memory@9c900000 { >> + wkup_r5fss0_core0_ipc_region: memory@9c900000 { > > There are still references to wkup_r5fss0_core0_memory_region in > k3-am62a-ti-ipc-firmware.dtsi (same comment applies to next 2 patches as > well) > > Dont those need to be updated too? I only updated the sk boards as these are the only ones that have IO+DDR support that I know works and need the new memory region layout. But thinking about this, updating the memory region structure shouldn't be a problem for the other boards either, of course I can't tell if IO+DDR would work on them, but the new memory region layout shouldn't break anything. I can respin the series or do a followup series with modifications for all boards if you like. Best Markus