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From: "Luca Weiss" <luca.weiss@fairphone.com>
To: "Vladimir Zapolskiy" <vladimir.zapolskiy@linaro.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>
Cc: <~postmarketos/upstreaming@lists.sr.ht>,
	<phone-devel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	"Luca Weiss" <luca.weiss@fairphone.com>
Subject: Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Sort pinctrl subnodes by pins
Date: Fri, 12 Jun 2026 15:46:21 +0200	[thread overview]
Message-ID: <DJ747VLQEHIN.Q3SS1FFC9I3L@fairphone.com> (raw)
In-Reply-To: <f05ad4ae-140a-40a7-a6ef-9ac2ddb0a939@linaro.org>

On Fri Jun 12, 2026 at 2:59 PM CEST, Vladimir Zapolskiy wrote:
> As documented in the "Devicetree Sources (DTS) Coding Style" document,
> pinctrl subnodes should be sorted by the pins property. Do this once for
> kodiak.dtsi so that future additions can be added at the right places.
>
> No functional change intended, verified with dtx_diff.
>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
>   arch/arm64/boot/dts/qcom/kodiak.dtsi | 1382 +++++++++++++++++-----------------
>   1 file changed, 691 insertions(+), 691 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index fa540d8c2615..62daef726d32 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi

<snip>

> +			qup_uart12_cts: qup-uart12-cts-state {
> +				pins = "gpio48";
> +				function = "qup14";
> +			};
> +
> +			qup_uart12_rts: qup-uart12-rts-state {
> +				pins = "gpio49";
> +				function = "qup14";
> +			};
> +
> +			qup_uart12_tx: qup-uart12-tx-state {
> +				pins = "gpio50";
> +				function = "qup14";
> +			};
>
> I understand and support the intention to keep this change non-functional,
> but this pad "gpio50" is for qup16 also, right?

According to my QCM6490 data sheet, GPIO_50 has these functions:
* UART for qup14 (OK)
* SPI for qup14 (OK)
* SPI for qup16 (no pinctrl)

>
> Similarly pads "gpio54"/"gpio55" for qup14 function, "gpio62"/"gpio63"
> for qup16 function, I find all of these are missing on the original list.

GPIO_54:
* UART qup15 (OK)
* SPI qup15 (OK)
* SPI qup14 (no pinctrl)

GPIO_55:
* UART qup15 (OK)
* SPI qup15 (OK)
* SPI qup14 (no pinctrl)

GPIO_62:
* UART qup17 (OK)
* SPI qup17 (OK)
* SPI qup16 (no pinctrl)

GPIO_63:
* UART qup16 (?)
* SPI qup16 (lane 3) (?)
* SPI qup16 (lane 5) (?)

But the GPIO_63 looks weird, is the data sheet wrong?! Where would
UART_RX of QUP1 SE7 go? Maybe it should be UART qup17 and SPI qup17 and
then SPI qup16 ??

Can somebody at Qualcomm please check 80-20659-1 Rev. AM and maybe make
the apppriate people there aware?

So yes Vladimir, you're correct. Some pinctrl definitions for those SPI
QUPs are not defined. And the datasheet seems wrong as well.

> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>

Thanks for checking!

Regards
Luca

  reply	other threads:[~2026-06-12 13:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-12 10:55 [PATCH 0/2] Sort kodiak pinctrl nodes & add camera mclk definitions Luca Weiss
2026-06-12 10:55 ` [PATCH 1/2] arm64: dts: qcom: kodiak: Sort pinctrl subnodes by pins Luca Weiss
2026-06-12 13:21   ` Dmitry Baryshkov
2026-06-12 10:55 ` [PATCH 2/2] arm64: dts: qcom: kodiak: Add camera mclk pinctrl definitions Luca Weiss
2026-06-12 13:02   ` Vladimir Zapolskiy
2026-06-15 12:10   ` Konrad Dybcio
2026-06-12 12:59 ` [PATCH 1/2] arm64: dts: qcom: kodiak: Sort pinctrl subnodes by pins Vladimir Zapolskiy
2026-06-12 13:46   ` Luca Weiss [this message]
2026-06-15 12:09     ` Konrad Dybcio
2026-06-22  7:05       ` Luca Weiss
2026-06-24  7:59         ` Konrad Dybcio
2026-06-24  8:00           ` Luca Weiss

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